[SeaBIOS] [PATCH 1/2] Add QEMU fw_cfg DMA interface

[Stefan Hajnoczi]

On Thu, Aug 6, 2015 at 12:02 PM, Marc Marí <markmb at redhat.com> wrote:
> +    if (qemu_cfg_dma_enabled()) {
> +        QemuCfgDmaAccess access;
> +
> +        access.address = (u64)(u32)buf;
> +        access.length = len;
> +        access.control = QEMU_CFG_DMA_CTL_READ;
> +
> +        /*
> +         * The out is done before the write of the variables on memory. This
> +         * causes misread on the QEMU side.
> +         */
> +        barrier();
> +
> +        outl((u32)&access, PORT_QEMU_CFG_DMA_ADDR);

I thought PORT_QEMU_CFG_DMA_ADDR is a 64-bit register according to the
spec you posted?

> +        while(access.length != 0 && !(access.control & QEMU_CFG_DMA_CTL_ERROR));

Either the field accesses need to be marked volatile, or a barrier is
needed to force the compiler to reload these register from memory each
iteration of the loop.

I think the problem is that there are no "sequence points" (according
to the C language specification) in this loop, so the compiler may
assume that access.length and access.control will not change.
https://en.wikipedia.org/wiki/Sequence_point

Stefan