[SeaBIOS] [PATCH 2/2] fw/pci: map memory and IO regions for multiple pci root buses

Kevin O'Connor kevin at koconnor.net
Mon Nov 24 18:21:31 CET 2014

On Mon, Nov 24, 2014 at 03:28:52PM +0100, Gerd Hoffmann wrote:
> On Mo, 2014-11-24 at 15:38 +0200, Marcel Apfelbaum wrote:
> > On Mon, 2014-11-24 at 13:28 +0100, Gerd Hoffmann wrote:
> > > Hmm, that assigns the io regions in bus order.  I think it would be
> > > better to integrate this with the packing logic we already have:
> > > regions are sorted by size for best packing.  Regions behind pci bridges
> > > are grouped together.  I think we could group regions belonging to a pci
> > > bus in a simliar way.
> > You are right, but only partial. Let me explain (as I understand it).
> > The devices IO regions behind the bus are *already* packed (sorted by size).
> > The buses themselves are indeed not sorted by their total IO space.
> > The same is happening in pci_bios_init_root_regions_mem with the MMIO regions.
> > 
> > It seems that what I have to do is simply replace the current bus enumeration:
> > 	for (i = 0; i <= MaxPCIBus; i++) {
> > with one that goes over the sorted list of buses in decreasing order of their
> > total mem/IO consumed.
> > 
> > Do you agree?
> I think I would try to reuse the existing code which does the same for
> bridges.  Reuse "struct pci_bus" to add one more level (and maybe rename
> the struct), then have the resource propagation code in
> pci_bios_check_devices() do the job.
> That will need some reorganization, because the simple "struct pci_bus
> *busses" array indexed by bus number will not work any more.

Why not just pretend that the extra root PCI buses are children of bus
zero (for resource sizing and mapping purposes).

That is, where pci_bios_check_devices() checks for "if (!s->bus_dev)
continue;" have it instead continue to process the bus, but have it
assume "parent = &busses[0];".  Any code that looks at bus->bus_dev
would also have to check that it is non-null, but I think much of the
existing code might just work.


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