[SeaBIOS] [Qemu-devel] [RFC PATCH v4 00/30] ACPI memory hotplug

li guang lig.fnst at cn.fujitsu.com
Wed Mar 27 03:42:00 CET 2013


在 2013-03-26二的 17:58 +0100,Vasilis Liaskovitis写道:
> Hi,
> 
> On Tue, Mar 19, 2013 at 02:30:25PM +0800, li guang wrote:
> > 在 2013-01-10四的 19:57 +0100,Vasilis Liaskovitis写道:
> > > > > 
> > > > > IIRC q35 supports memory hotplug natively (picked up in some
> > > > > discussion).  Is that correct?
> > > > > 
> > > > From previous discussion I also understand that q35 supports native hotplug. 
> > > > Sections 5.1 and 5.2 of the spec describe the MCH registers but the native
> > > > memory hotplug specifics are not yet clear to me. Any pointers from the
> > > > spec are welcome.
> > > 
> > > Ping. Could anyone who's familiar with the q35 spec provide some pointers on
> > > native memory hotplug details in the spec? I see pcie hotplug registers but can't
> > > find memory hotplug interface details. If I am not mistaken, the spec is here:
> > > http://www.intel.com/design/chipsets/datashts/316966.htm
> > > 
> > > Is the q35 memory hotplug support supposed to be an shpc-like interface geared
> > > towards memory slots instead of pci slots?
> > > 
> > 
> > seems there's no so-called q35-native support
> 
> that was also my first impression when scanning the specification. Wasn't native
> memory hotplug capabilities one of the reasons that q35 got picked as the next
> pc chipset?

Um, I can't find the original statement of q35,
but I think if we can't find in intel's official
SPEC, then we have to say 'there's no q35-native support'.





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