[SeaBIOS] [PATCH 2/3] pvscsi: Always run entirely in 32bit mode.

Kevin O'Connor kevin at koconnor.net
Fri Dec 27 18:18:13 CET 2013


Instead of jumping into 32bit mode to access the PCI config space, run
the entire driver in 32bit mode.

Signed-off-by: Kevin O'Connor <kevin at koconnor.net>
---
 Makefile          |  4 ++--
 src/block.c       |  8 ++++++--
 src/hw/blockcmd.c |  3 ++-
 src/hw/pvscsi.c   | 30 +++++++++++++++---------------
 4 files changed, 25 insertions(+), 20 deletions(-)

diff --git a/Makefile b/Makefile
index aba8a62..414c90a 100644
--- a/Makefile
+++ b/Makefile
@@ -34,11 +34,11 @@ SRCBOTH=misc.c stacks.c output.c string.c x86.c block.c cdrom.c mouse.c kbd.c \
     hw/usb-hid.c hw/usb-msc.c hw/usb-uas.c \
     hw/blockcmd.c hw/floppy.c hw/ata.c hw/ramdisk.c \
     hw/virtio-ring.c hw/virtio-pci.c hw/virtio-blk.c hw/virtio-scsi.c \
-    hw/lsi-scsi.c hw/esp-scsi.c hw/megasas.c hw/pvscsi.c
+    hw/lsi-scsi.c hw/esp-scsi.c hw/megasas.c
 SRC16=$(SRCBOTH) system.c disk.c font.c
 SRC32FLAT=$(SRCBOTH) post.c memmap.c malloc.c pmm.c romfile.c optionroms.c \
     boot.c bootsplash.c jpeg.c bmp.c \
-    hw/ahci.c hw/usb-hub.c \
+    hw/ahci.c hw/pvscsi.c hw/usb-hub.c \
     fw/coreboot.c fw/lzmadecode.c fw/csm.c fw/biostables.c \
     fw/paravirt.c fw/shadow.c fw/pciinit.c fw/smm.c fw/mtrr.c fw/xen.c \
     fw/acpi.c fw/mptable.c fw/pirtable.c fw/smbios.c fw/romfile_loader.c
diff --git a/src/block.c b/src/block.c
index ac2a830..898c279 100644
--- a/src/block.c
+++ b/src/block.c
@@ -313,7 +313,7 @@ __disk_ret_unimplemented(struct bregs *regs, u32 linecode, const char *fname)
  * 16bit calling interface
  ****************************************************************/
 
-static int
+int VISIBLE32FLAT
 process_scsi_op(struct disk_op_s *op)
 {
     switch (op->command) {
@@ -386,9 +386,13 @@ process_op(struct disk_op_s *op)
     case DTYPE_LSI_SCSI:
     case DTYPE_ESP_SCSI:
     case DTYPE_MEGASAS:
-    case DTYPE_PVSCSI:
         ret = process_scsi_op(op);
         break;
+    case DTYPE_PVSCSI: ;
+        extern void _cfunc32flat_process_scsi_op(void);
+        ret = call32(_cfunc32flat_process_scsi_op
+                     , (u32)MAKE_FLATPTR(GET_SEG(SS), op), DISK_RET_EPARAM);
+        break;
     default:
         ret = DISK_RET_EPARAM;
         break;
diff --git a/src/hw/blockcmd.c b/src/hw/blockcmd.c
index 97c6675..db61cbd 100644
--- a/src/hw/blockcmd.c
+++ b/src/hw/blockcmd.c
@@ -44,7 +44,8 @@ cdb_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize)
     case DTYPE_MEGASAS:
         return megasas_cmd_data(op, cdbcmd, blocksize);
     case DTYPE_PVSCSI:
-        return pvscsi_cmd_data(op, cdbcmd, blocksize);
+        if (!MODESEGMENT)
+            return pvscsi_cmd_data(op, cdbcmd, blocksize);
     case DTYPE_AHCI_ATAPI:
         if (!MODESEGMENT)
             return ahci_cmd_data(op, cdbcmd, blocksize);
diff --git a/src/hw/pvscsi.c b/src/hw/pvscsi.c
index 00ce377..8b4b10f 100644
--- a/src/hw/pvscsi.c
+++ b/src/hw/pvscsi.c
@@ -129,41 +129,41 @@ struct pvscsi_ring_dsc_s {
 
 struct pvscsi_lun_s {
     struct drive_s drive;
-    u32 iobase;
+    void *iobase;
     u8 target;
     u8 lun;
     struct pvscsi_ring_dsc_s *ring_dsc;
 };
 
 static void
-pvscsi_write_cmd_desc(u32 iobase, u32 cmd, const void *desc, size_t len)
+pvscsi_write_cmd_desc(void *iobase, u32 cmd, const void *desc, size_t len)
 {
     const u32 *ptr = desc;
     size_t i;
 
     len /= sizeof(*ptr);
-    pci_writel(iobase + PVSCSI_REG_OFFSET_COMMAND, cmd);
+    writel(iobase + PVSCSI_REG_OFFSET_COMMAND, cmd);
     for (i = 0; i < len; i++)
-        pci_writel(iobase + PVSCSI_REG_OFFSET_COMMAND_DATA, ptr[i]);
+        writel(iobase + PVSCSI_REG_OFFSET_COMMAND_DATA, ptr[i]);
 }
 
 static void
-pvscsi_kick_rw_io(u32 iobase)
+pvscsi_kick_rw_io(void *iobase)
 {
-    pci_writel(iobase + PVSCSI_REG_OFFSET_KICK_RW_IO, 0);
+    writel(iobase + PVSCSI_REG_OFFSET_KICK_RW_IO, 0);
 }
 
 static void
-pvscsi_wait_intr_cmpl(u32 iobase)
+pvscsi_wait_intr_cmpl(void *iobase)
 {
-    while (!(pci_readl(iobase + PVSCSI_REG_OFFSET_INTR_STATUS) & PVSCSI_INTR_CMPL_MASK))
+    while (!(readl(iobase + PVSCSI_REG_OFFSET_INTR_STATUS) & PVSCSI_INTR_CMPL_MASK))
         usleep(5);
-    pci_writel(iobase + PVSCSI_REG_OFFSET_INTR_STATUS, PVSCSI_INTR_CMPL_MASK);
+    writel(iobase + PVSCSI_REG_OFFSET_INTR_STATUS, PVSCSI_INTR_CMPL_MASK);
 
 }
 
 static void
-pvscsi_init_rings(u32 iobase, struct pvscsi_ring_dsc_s **ring_dsc)
+pvscsi_init_rings(void *iobase, struct pvscsi_ring_dsc_s **ring_dsc)
 {
     struct PVSCSICmdDescSetupRings cmd = {0,};
 
@@ -279,7 +279,7 @@ pvscsi_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize)
 }
 
 static int
-pvscsi_add_lun(struct pci_device *pci, u32 iobase,
+pvscsi_add_lun(struct pci_device *pci, void *iobase,
                struct pvscsi_ring_dsc_s *ring_dsc, u8 target, u8 lun)
 {
     struct pvscsi_lun_s *plun = malloc_fseg(sizeof(*plun));
@@ -311,7 +311,7 @@ fail:
 }
 
 static void
-pvscsi_scan_target(struct pci_device *pci, u32 iobase,
+pvscsi_scan_target(struct pci_device *pci, void *iobase,
                    struct pvscsi_ring_dsc_s *ring_dsc, u8 target)
 {
     /* TODO: send REPORT LUNS.  For now, only LUN 0 is recognized.  */
@@ -324,12 +324,12 @@ init_pvscsi(struct pci_device *pci)
     struct pvscsi_ring_dsc_s *ring_dsc = NULL;
     int i;
     u16 bdf = pci->bdf;
-    u32 iobase = pci_config_readl(pci->bdf, PCI_BASE_ADDRESS_0)
-        & PCI_BASE_ADDRESS_MEM_MASK;
+    void *iobase = (void*)(pci_config_readl(pci->bdf, PCI_BASE_ADDRESS_0)
+                           & PCI_BASE_ADDRESS_MEM_MASK);
 
     pci_config_maskw(bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
 
-    dprintf(1, "found pvscsi at %02x:%02x.%x, io @ %x\n",
+    dprintf(1, "found pvscsi at %02x:%02x.%x, io @ %p\n",
             pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf),
             pci_bdf_to_fn(bdf), iobase);
 
-- 
1.8.3.1




More information about the SeaBIOS mailing list