[SeaBIOS] [PATCH 15/15] Turn Flat Panel on

[Christian Gmeiner]

Add functions, defines etc. to be able to control the power state
of the Flat Panel. Turn it on on per default.

Signed-off-by: Christian Gmeiner <christian.gmeiner at gmail.com>
---
 vgasrc/geodevga.c | 20 ++++++++++++++++++++
 vgasrc/geodevga.h |  5 +++++
 2 files changed, 25 insertions(+)

diff --git a/vgasrc/geodevga.c b/vgasrc/geodevga.c
index 8520f2e..facaafd 100644
--- a/vgasrc/geodevga.c
+++ b/vgasrc/geodevga.c
@@ -149,6 +149,8 @@ struct geode {
 };
 struct geode geode VAR16;
 
+#define VP_FP_START     0x400
+
 static u32 read_dc(int reg)
 {
     u32 val = geode_memRead(geode.dc + reg);
@@ -163,6 +165,13 @@ static u32 read_vp(int reg)
     return val;
 }
 
+static u32 read_fp(int reg)
+{
+    u32 val = geode_memRead(geode.vp + VP_FP_START +reg);
+    dprintf(4, "%s(0x%08x) = 0x%08x\n", __func__, geode.vp + VP_FP_START + reg, val);
+    return val;
+}
+
 static void write_dc(int reg, u32 val)
 {
     dprintf(4, "%s(0x%08x, 0x%08x)\n", __func__, geode.dc + reg, val);
@@ -175,6 +184,12 @@ static void write_vp(int reg, u32 val)
     geode_memWrite(geode.vp + reg, 0x0, val);
 }
 
+static void write_fp(int reg, u32 val)
+{
+    dprintf(4, "%s(0x%08x, 0x%08x)\n", __func__, geode.vp + VP_FP_START + reg, val);
+    geode_memWrite(geode.vp + VP_FP_START + reg, 0x0, val);
+}
+
 static int legacyio_check(void)
 {
     int ret=0;
@@ -304,6 +319,11 @@ static void vp_setup(void)
     geode_memWrite(geode.vp + VP_DCFG, ~0,VP_CRT_EN+VP_HSYNC_EN+VP_VSYNC_EN+VP_DAC_BL_EN+VP_CRT_SKEW);
     reg = read_vp(VP_DCFG);
     dprintf(1,"VP_SETUP VP_DCFG=0x%08x\n",reg);
+
+    /* turn the panel on (if it isn't already) */
+    reg = read_fp(FP_PM);
+    reg |= FP_PM_P;
+    write_fp(FP_PM, reg);
 }
 
 /****************************************************************
diff --git a/vgasrc/geodevga.h b/vgasrc/geodevga.h
index ccc23d0..358c9da 100644
--- a/vgasrc/geodevga.h
+++ b/vgasrc/geodevga.h
@@ -52,6 +52,8 @@
 #define VP_DCFG                         0x8
 #define VP_MISC                         0x50
 
+/* FP REG OFFSET */
+#define FP_PM				0x10
 
 /* DC bits */
 #define DC_VGAE                         (1 << 7)
@@ -66,6 +68,9 @@
 #define VP_CRT_SKEW                     (1 << 16)
 #define VP_BYP_BOTH                     (1 << 0)
 
+/* FP bits */
+#define FP_PM_P                         (1 << 24)       /* panel power ctl */
+
 /* Mask */
 #define DC_CFG_MSK                      0xf000a6
 
-- 
1.7.11.rc2.5.g68f532f