[SeaBIOS] [PATCH 00/11] q35: acpi bits

[Gerd Hoffmann]

  Hi,

This series adds the q35 acpi bits (as is, first two patches), then goes
cleanup stuff my subsequently moving reusable stuff to separate include
files and make both piix and q35 include them.  Kept fine-gained
splitted for now so it is easy to reorder/squash stuff for merge.

Unsolved issues:

ISA devices.  See patch #11 for an idea how to tackle this, I don't like
it that much though.  /me is open for better ideas.

VGA.  It's in slot 2 for piix and slot 1 for q35.  So the current q35
dsdt is simply plain wrong as it declares the vga for slot 2.  Is there
some way to deal with that in AML code?  Note: That this isn't q35
specific issue.  Recent qemu versions allow to place the vga in any
slot (try "qemu -vga none -device VGA,addr=0a.0").

Comments & Reviews are welcome.

cheers,
  Gerd

Gerd Hoffmann (9):
  acpi: move DBUG() to separate file
  acpi: move DBUG() to separate file [q35]
  acpi: move \_SB.HPET to separate file
  acpi: move \_SB.HPET to separate file [q35]
  acpi: move \_SB.PCI0._CRS to separate file
  acpi: move \_SB.PCI0._CRS to separate file [q35]
  acpi: move cpu hotplug to separate file
  acpi: move cpu hotplug to separate file [q35]
  [RfC] acpi: rework enable bits

Isaku Yamahata (1):
  seabios: q35: add dsdt

Jan Kiszka (1):
  seabios: q35: Register PCI IRQs as active high in APIC mode

 Makefile                      |    2 +-
 src/acpi-dsdt-cpu-hotplug.dsl |   78 +++++
 src/acpi-dsdt-dbug.dsl        |   30 ++
 src/acpi-dsdt-hpet.dsl        |   36 ++
 src/acpi-dsdt-pci-crs.dsl     |  104 ++++++
 src/acpi-dsdt.dsl             |  344 ++++----------------
 src/q35-acpi-dsdt.dsl         |  717 +++++++++++++++++++++++++++++++++++++++++
 7 files changed, 1023 insertions(+), 288 deletions(-)
 create mode 100644 src/acpi-dsdt-cpu-hotplug.dsl
 create mode 100644 src/acpi-dsdt-dbug.dsl
 create mode 100644 src/acpi-dsdt-hpet.dsl
 create mode 100644 src/acpi-dsdt-pci-crs.dsl
 create mode 100644 src/q35-acpi-dsdt.dsl