[SeaBIOS] [PATCH 6/6] pci: runtime i/o window sizing

Gerd Hoffmann kraxel at redhat.com
Tue May 22 12:08:34 CEST 2012


On 05/18/12 05:09, Kevin O'Connor wrote:
> On Tue, May 15, 2012 at 12:46:26PM +0200, Gerd Hoffmann wrote:
>> Update the pci i/o windows at runtime, depending on the amount memory
>> the machine has.  The 32bit window starts above low memory and ends at
>> the ioapic map address, the 64bit window is placed above high memory.
>>
>> Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
>> ---
>>  src/pciinit.c |   25 +++++++++++++++++++++----
>>  1 files changed, 21 insertions(+), 4 deletions(-)
>>
>> diff --git a/src/pciinit.c b/src/pciinit.c
>> index c1d932a..23706f7 100644
>> --- a/src/pciinit.c
>> +++ b/src/pciinit.c
>> @@ -591,6 +591,11 @@ static void pci_region_map_entries(struct pci_bus *busses, struct pci_region *r)
>>  
>>  static void pci_bios_map_devices(struct pci_bus *busses)
>>  {
>> +    u64 pcimem64_size;
>> +    int shift;
>> +
>> +    pcimem_start = RamSize;
>> +
>>      if (pci_bios_init_root_regions(busses)) {
>>          struct pci_region r64_mem, r64_pref;
>>          r64_mem.list = NULL;
>> @@ -603,14 +608,26 @@ static void pci_bios_map_devices(struct pci_bus *busses)
>>          if (pci_bios_init_root_regions(busses))
>>              panic("PCI: out of 32bit address space\n");
>>  
>> -        r64_mem.base = pcimem64_start;
>> -        u64 sum = pci_region_sum(&r64_mem);
>> -        u64 align = pci_region_align(&r64_pref);
>> -        r64_pref.base = ALIGN(r64_mem.base + sum, align);
>> +        // try 4 GB ... 512 GB
>> +        for (shift = 32; shift < 39; shift++) {
>> +            pcimem64_size = (1LL << shift);
>> +            pcimem64_start = (RamSizeOver4G + pcimem64_size) & ~(pcimem64_size-1);
>> +            pcimem64_end = pcimem64_start + pcimem64_size;
>> +
>> +            r64_mem.base = pcimem64_start;
>> +            u64 sum = pci_region_sum(&r64_mem);
>> +            u64 align = pci_region_align(&r64_pref);
>> +            r64_pref.base = ALIGN(r64_mem.base + sum, align);
>> +            if (r64_pref.base + pci_region_sum(&r64_pref) <= pcimem64_end)
>> +                break;
>> +        }
> 
> Can you describe what this does?  I'm guessing this attempts
> progressively larger memory spaces until one fits

Exactly.

> - but why not just
> always use the largest space?

It somehow feels more save to not use more address space than we have
to.  There are processors which have 36 physical address lines and thus
can cover 64G max.  But I'm not sure if and how that affects virtual
machines.  Maybe this care is not needed and we can go for a
half-terabyte window (which needs 40 address bits) unconditionally.

cheers,
  Gerd



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