[SeaBIOS] [PATCH] EHCI: Add support for 64 bit capability

[Sven Schnelle]

Signed-off-by: Sven Schnelle <svens at stackframe.org>
---
 src/usb-ehci.c |    6 ++----
 src/usb-ehci.h |    9 ++++++---
 2 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/src/usb-ehci.c b/src/usb-ehci.c
index 4cb3e6a..8267a63 100644
--- a/src/usb-ehci.c
+++ b/src/usb-ehci.c
@@ -334,10 +334,6 @@ ehci_init(struct pci_device *pci, int busid, struct pci_device *comppci)
     u32 baseaddr = pci_config_readl(bdf, PCI_BASE_ADDRESS_0);
     struct ehci_caps *caps = (void*)(baseaddr & PCI_BASE_ADDRESS_MEM_MASK);
     u32 hcc_params = readl(&caps->hccparams);
-    if (hcc_params & HCC_64BIT_ADDR) {
-        dprintf(1, "No support for 64bit EHCI\n");
-        return -1;
-    }
 
     struct usb_ehci_s *cntl = malloc_tmphigh(sizeof(*cntl));
     if (!cntl) {
@@ -349,6 +345,8 @@ ehci_init(struct pci_device *pci, int busid, struct pci_device *comppci)
     cntl->usb.pci = pci;
     cntl->usb.type = USB_TYPE_EHCI;
     cntl->caps = caps;
+    if (hcc_params & HCC_64BIT_ADDR)
+	cntl->regs->ctrldssegment = 0;
     cntl->regs = (void*)caps + readb(&caps->caplength);
 
     dprintf(1, "EHCI init on dev %02x:%02x.%x (regs=%p)\n"
diff --git a/src/usb-ehci.h b/src/usb-ehci.h
index b295c78..924bbd8 100644
--- a/src/usb-ehci.h
+++ b/src/usb-ehci.h
@@ -102,7 +102,7 @@ struct ehci_qh {
     u32 alt_next;
     u32 token;
     u32 buf[5];
-    // u32 buf_hi[5];
+    u32 buf_hi[5];
 } PACKED;
 
 #define QH_CONTROL       (1 << 27)
@@ -140,8 +140,11 @@ struct ehci_qtd {
     u32 alt_next;
     u32 token;
     u32 buf[5];
-    //u32 buf_hi[5];
-} PACKED;
+    u32 buf_hi[5];
+    /* keep struct size a multiple of 32 Bytes, as we're allocating
+       arrays. Without this padding, the second qtd would have the
+       wrong alignment. */
+} PACKED __aligned(32);
 
 #define QTD_TOGGLE      (1 << 31)
 #define QTD_LENGTH_SHIFT 16
-- 
1.7.10