[SeaBIOS] [PATCH 08/20] vgabios: Rename vgahw_* functions to stdvga_*.
Kevin O'Connor
kevin at koconnor.net
Sun Jan 1 18:21:56 CET 2012
Signed-off-by: Kevin O'Connor <kevin at koconnor.net>
---
vgasrc/clext.c | 4 +-
vgasrc/stdvga.c | 70 +++++++++++++++++++++++++-------------------------
vgasrc/stdvga.h | 64 ++++++++++++++++++++++----------------------
vgasrc/vgabios.c | 76 +++++++++++++++++++++++++++---------------------------
vgasrc/vgafb.c | 38 +++++++++++++-------------
5 files changed, 126 insertions(+), 126 deletions(-)
diff --git a/vgasrc/clext.c b/vgasrc/clext.c
index 764d05b..7987d28 100644
--- a/vgasrc/clext.c
+++ b/vgasrc/clext.c
@@ -353,12 +353,12 @@ cirrus_switch_mode(struct cirrus_mode_s *table)
outb(0xff, VGAREG_PEL_MASK);
u8 vesacolortype = GET_GLOBAL(table->vesacolortype);
- u8 v = vgahw_get_single_palette_reg(0x10) & 0xfe;
+ u8 v = stdvga_get_single_palette_reg(0x10) & 0xfe;
if (vesacolortype == 3)
v |= 0x41;
else if (vesacolortype)
v |= 0x01;
- vgahw_set_single_palette_reg(0x10, v);
+ stdvga_set_single_palette_reg(0x10, v);
}
static u8
diff --git a/vgasrc/stdvga.c b/vgasrc/stdvga.c
index 1727fca..fd8514e 100644
--- a/vgasrc/stdvga.c
+++ b/vgasrc/stdvga.c
@@ -5,7 +5,7 @@
//
// This file may be distributed under the terms of the GNU LGPLv3 license.
-#include "stdvga.h" // vgahw_init
+#include "stdvga.h" // stdvga_init
#include "ioport.h" // outb
#include "farptr.h" // SET_FARVAR
#include "biosvar.h" // GET_BDA
@@ -20,21 +20,21 @@
****************************************************************/
void
-vgahw_screen_disable(void)
+stdvga_screen_disable(void)
{
inb(VGAREG_ACTL_RESET);
outb(0x00, VGAREG_ACTL_ADDRESS);
}
void
-vgahw_screen_enable(void)
+stdvga_screen_enable(void)
{
inb(VGAREG_ACTL_RESET);
outb(0x20, VGAREG_ACTL_ADDRESS);
}
void
-vgahw_set_border_color(u8 color)
+stdvga_set_border_color(u8 color)
{
inb(VGAREG_ACTL_RESET);
outb(0x00, VGAREG_ACTL_ADDRESS);
@@ -57,7 +57,7 @@ vgahw_set_border_color(u8 color)
}
void
-vgahw_set_overscan_border_color(u8 color)
+stdvga_set_overscan_border_color(u8 color)
{
inb(VGAREG_ACTL_RESET);
outb(0x11, VGAREG_ACTL_ADDRESS);
@@ -66,7 +66,7 @@ vgahw_set_overscan_border_color(u8 color)
}
u8
-vgahw_get_overscan_border_color(void)
+stdvga_get_overscan_border_color(void)
{
inb(VGAREG_ACTL_RESET);
outb(0x11, VGAREG_ACTL_ADDRESS);
@@ -77,7 +77,7 @@ vgahw_get_overscan_border_color(void)
}
void
-vgahw_set_palette(u8 palid)
+stdvga_set_palette(u8 palid)
{
inb(VGAREG_ACTL_RESET);
palid &= 0x01;
@@ -94,7 +94,7 @@ vgahw_set_palette(u8 palid)
}
void
-vgahw_set_single_palette_reg(u8 reg, u8 val)
+stdvga_set_single_palette_reg(u8 reg, u8 val)
{
inb(VGAREG_ACTL_RESET);
outb(reg, VGAREG_ACTL_ADDRESS);
@@ -103,7 +103,7 @@ vgahw_set_single_palette_reg(u8 reg, u8 val)
}
u8
-vgahw_get_single_palette_reg(u8 reg)
+stdvga_get_single_palette_reg(u8 reg)
{
inb(VGAREG_ACTL_RESET);
outb(reg, VGAREG_ACTL_ADDRESS);
@@ -114,7 +114,7 @@ vgahw_get_single_palette_reg(u8 reg)
}
void
-vgahw_set_all_palette_reg(u16 seg, u8 *data_far)
+stdvga_set_all_palette_reg(u16 seg, u8 *data_far)
{
inb(VGAREG_ACTL_RESET);
int i;
@@ -130,7 +130,7 @@ vgahw_set_all_palette_reg(u16 seg, u8 *data_far)
}
void
-vgahw_get_all_palette_reg(u16 seg, u8 *data_far)
+stdvga_get_all_palette_reg(u16 seg, u8 *data_far)
{
int i;
for (i = 0; i < 0x10; i++) {
@@ -147,7 +147,7 @@ vgahw_get_all_palette_reg(u16 seg, u8 *data_far)
}
void
-vgahw_toggle_intensity(u8 flag)
+stdvga_toggle_intensity(u8 flag)
{
inb(VGAREG_ACTL_RESET);
outb(0x10, VGAREG_ACTL_ADDRESS);
@@ -157,7 +157,7 @@ vgahw_toggle_intensity(u8 flag)
}
void
-vgahw_select_video_dac_color_page(u8 flag, u8 data)
+stdvga_select_video_dac_color_page(u8 flag, u8 data)
{
inb(VGAREG_ACTL_RESET);
outb(0x10, VGAREG_ACTL_ADDRESS);
@@ -180,7 +180,7 @@ vgahw_select_video_dac_color_page(u8 flag, u8 data)
}
void
-vgahw_read_video_dac_state(u8 *pmode, u8 *curpage)
+stdvga_read_video_dac_state(u8 *pmode, u8 *curpage)
{
inb(VGAREG_ACTL_RESET);
outb(0x10, VGAREG_ACTL_ADDRESS);
@@ -205,7 +205,7 @@ vgahw_read_video_dac_state(u8 *pmode, u8 *curpage)
****************************************************************/
void
-vgahw_set_dac_regs(u16 seg, u8 *data_far, u8 start, int count)
+stdvga_set_dac_regs(u16 seg, u8 *data_far, u8 start, int count)
{
outb(start, VGAREG_DAC_WRITE_ADDRESS);
while (count) {
@@ -220,7 +220,7 @@ vgahw_set_dac_regs(u16 seg, u8 *data_far, u8 start, int count)
}
void
-vgahw_get_dac_regs(u16 seg, u8 *data_far, u8 start, int count)
+stdvga_get_dac_regs(u16 seg, u8 *data_far, u8 start, int count)
{
outb(start, VGAREG_DAC_READ_ADDRESS);
while (count) {
@@ -235,33 +235,33 @@ vgahw_get_dac_regs(u16 seg, u8 *data_far, u8 start, int count)
}
void
-vgahw_set_pel_mask(u8 val)
+stdvga_set_pel_mask(u8 val)
{
outb(val, VGAREG_PEL_MASK);
}
u8
-vgahw_get_pel_mask(void)
+stdvga_get_pel_mask(void)
{
return inb(VGAREG_PEL_MASK);
}
void
-vgahw_save_dac_state(u16 seg, struct saveDACcolors *info)
+stdvga_save_dac_state(u16 seg, struct saveDACcolors *info)
{
/* XXX: check this */
SET_FARVAR(seg, info->rwmode, inb(VGAREG_DAC_STATE));
SET_FARVAR(seg, info->peladdr, inb(VGAREG_DAC_WRITE_ADDRESS));
SET_FARVAR(seg, info->pelmask, inb(VGAREG_PEL_MASK));
- vgahw_get_dac_regs(seg, info->dac, 0, 256);
+ stdvga_get_dac_regs(seg, info->dac, 0, 256);
SET_FARVAR(seg, info->color_select, 0);
}
void
-vgahw_restore_dac_state(u16 seg, struct saveDACcolors *info)
+stdvga_restore_dac_state(u16 seg, struct saveDACcolors *info)
{
outb(GET_FARVAR(seg, info->pelmask), VGAREG_PEL_MASK);
- vgahw_set_dac_regs(seg, info->dac, 0, 256);
+ stdvga_set_dac_regs(seg, info->dac, 0, 256);
outb(GET_FARVAR(seg, info->peladdr), VGAREG_DAC_WRITE_ADDRESS);
}
@@ -271,19 +271,19 @@ vgahw_restore_dac_state(u16 seg, struct saveDACcolors *info)
****************************************************************/
void
-vgahw_sequ_write(u8 index, u8 value)
+stdvga_sequ_write(u8 index, u8 value)
{
outw((value<<8) | index, VGAREG_SEQU_ADDRESS);
}
void
-vgahw_grdc_write(u8 index, u8 value)
+stdvga_grdc_write(u8 index, u8 value)
{
outw((value<<8) | index, VGAREG_GRDC_ADDRESS);
}
void
-vgahw_set_text_block_specifier(u8 spec)
+stdvga_set_text_block_specifier(u8 spec)
{
outw((spec << 8) | 0x03, VGAREG_SEQU_ADDRESS);
}
@@ -325,7 +325,7 @@ get_crtc(void)
}
void
-vgahw_set_cursor_shape(u8 start, u8 end)
+stdvga_set_cursor_shape(u8 start, u8 end)
{
u16 crtc_addr = get_crtc();
outb(0x0a, crtc_addr);
@@ -335,7 +335,7 @@ vgahw_set_cursor_shape(u8 start, u8 end)
}
void
-vgahw_set_active_page(u16 address)
+stdvga_set_active_page(u16 address)
{
u16 crtc_addr = get_crtc();
outb(0x0c, crtc_addr);
@@ -345,7 +345,7 @@ vgahw_set_active_page(u16 address)
}
void
-vgahw_set_cursor_pos(u16 address)
+stdvga_set_cursor_pos(u16 address)
{
u16 crtc_addr = get_crtc();
outb(0x0e, crtc_addr);
@@ -355,7 +355,7 @@ vgahw_set_cursor_pos(u16 address)
}
void
-vgahw_set_scan_lines(u8 lines)
+stdvga_set_scan_lines(u8 lines)
{
u16 crtc_addr = get_crtc();
outb(0x09, crtc_addr);
@@ -366,7 +366,7 @@ vgahw_set_scan_lines(u8 lines)
// Get vertical display end
u16
-vgahw_get_vde(void)
+stdvga_get_vde(void)
{
u16 crtc_addr = get_crtc();
outb(0x12, crtc_addr);
@@ -383,7 +383,7 @@ vgahw_get_vde(void)
****************************************************************/
void
-vgahw_save_state(u16 seg, struct saveVideoHardware *info)
+stdvga_save_state(u16 seg, struct saveVideoHardware *info)
{
u16 crtc_addr = get_crtc();
SET_FARVAR(seg, info->sequ_index, inb(VGAREG_SEQU_ADDRESS));
@@ -427,7 +427,7 @@ vgahw_save_state(u16 seg, struct saveVideoHardware *info)
}
void
-vgahw_restore_state(u16 seg, struct saveVideoHardware *info)
+stdvga_restore_state(u16 seg, struct saveVideoHardware *info)
{
// Reset Attribute Ctl flip-flop
inb(VGAREG_ACTL_RESET);
@@ -482,7 +482,7 @@ vgahw_restore_state(u16 seg, struct saveVideoHardware *info)
}
void
-vgahw_set_mode(struct vgamode_s *vmode_g)
+stdvga_set_mode(struct vgamode_s *vmode_g)
{
// Reset Attribute Ctl flip-flop
inb(VGAREG_ACTL_RESET);
@@ -542,7 +542,7 @@ vgahw_set_mode(struct vgamode_s *vmode_g)
****************************************************************/
void
-vgahw_enable_video_addressing(u8 disable)
+stdvga_enable_video_addressing(u8 disable)
{
u8 v = (disable & 1) ? 0x00 : 0x02;
u8 v2 = inb(VGAREG_READ_MISC_OUTPUT) & ~0x02;
@@ -550,7 +550,7 @@ vgahw_enable_video_addressing(u8 disable)
}
void
-vgahw_init(void)
+stdvga_init(void)
{
// switch to color mode and enable CPU access 480 lines
outb(0xc3, VGAREG_WRITE_MISC_OUTPUT);
diff --git a/vgasrc/stdvga.h b/vgasrc/stdvga.h
index 53fe3cf..7fa612e 100644
--- a/vgasrc/stdvga.h
+++ b/vgasrc/stdvga.h
@@ -105,39 +105,39 @@ struct saveDACcolors {
u8 color_select;
};
-void vgahw_screen_disable(void);
-void vgahw_screen_enable(void);
-void vgahw_set_border_color(u8 color);
-void vgahw_set_overscan_border_color(u8 color);
-u8 vgahw_get_overscan_border_color(void);
-void vgahw_set_palette(u8 palid);
-void vgahw_set_single_palette_reg(u8 reg, u8 val);
-u8 vgahw_get_single_palette_reg(u8 reg);
-void vgahw_set_all_palette_reg(u16 seg, u8 *data_far);
-void vgahw_get_all_palette_reg(u16 seg, u8 *data_far);
-void vgahw_toggle_intensity(u8 flag);
-void vgahw_select_video_dac_color_page(u8 flag, u8 data);
-void vgahw_read_video_dac_state(u8 *pmode, u8 *curpage);
-void vgahw_set_dac_regs(u16 seg, u8 *data_far, u8 start, int count);
-void vgahw_get_dac_regs(u16 seg, u8 *data_far, u8 start, int count);
-void vgahw_set_pel_mask(u8 val);
-u8 vgahw_get_pel_mask(void);
-void vgahw_save_dac_state(u16 seg, struct saveDACcolors *info);
-void vgahw_restore_dac_state(u16 seg, struct saveDACcolors *info);
-void vgahw_sequ_write(u8 index, u8 value);
-void vgahw_grdc_write(u8 index, u8 value);
-void vgahw_set_text_block_specifier(u8 spec);
+void stdvga_screen_disable(void);
+void stdvga_screen_enable(void);
+void stdvga_set_border_color(u8 color);
+void stdvga_set_overscan_border_color(u8 color);
+u8 stdvga_get_overscan_border_color(void);
+void stdvga_set_palette(u8 palid);
+void stdvga_set_single_palette_reg(u8 reg, u8 val);
+u8 stdvga_get_single_palette_reg(u8 reg);
+void stdvga_set_all_palette_reg(u16 seg, u8 *data_far);
+void stdvga_get_all_palette_reg(u16 seg, u8 *data_far);
+void stdvga_toggle_intensity(u8 flag);
+void stdvga_select_video_dac_color_page(u8 flag, u8 data);
+void stdvga_read_video_dac_state(u8 *pmode, u8 *curpage);
+void stdvga_set_dac_regs(u16 seg, u8 *data_far, u8 start, int count);
+void stdvga_get_dac_regs(u16 seg, u8 *data_far, u8 start, int count);
+void stdvga_set_pel_mask(u8 val);
+u8 stdvga_get_pel_mask(void);
+void stdvga_save_dac_state(u16 seg, struct saveDACcolors *info);
+void stdvga_restore_dac_state(u16 seg, struct saveDACcolors *info);
+void stdvga_sequ_write(u8 index, u8 value);
+void stdvga_grdc_write(u8 index, u8 value);
+void stdvga_set_text_block_specifier(u8 spec);
void get_font_access(void);
void release_font_access(void);
-void vgahw_set_cursor_shape(u8 start, u8 end);
-void vgahw_set_active_page(u16 address);
-void vgahw_set_cursor_pos(u16 address);
-void vgahw_set_scan_lines(u8 lines);
-u16 vgahw_get_vde(void);
-void vgahw_save_state(u16 seg, struct saveVideoHardware *info);
-void vgahw_restore_state(u16 seg, struct saveVideoHardware *info);
-void vgahw_set_mode(struct vgamode_s *vmode_g);
-void vgahw_enable_video_addressing(u8 disable);
-void vgahw_init(void);
+void stdvga_set_cursor_shape(u8 start, u8 end);
+void stdvga_set_active_page(u16 address);
+void stdvga_set_cursor_pos(u16 address);
+void stdvga_set_scan_lines(u8 lines);
+u16 stdvga_get_vde(void);
+void stdvga_save_state(u16 seg, struct saveVideoHardware *info);
+void stdvga_restore_state(u16 seg, struct saveVideoHardware *info);
+void stdvga_set_mode(struct vgamode_s *vmode_g);
+void stdvga_enable_video_addressing(u8 disable);
+void stdvga_init(void);
#endif // stdvga.h
diff --git a/vgasrc/vgabios.c b/vgasrc/vgabios.c
index 3caff5f..5f646cd 100644
--- a/vgasrc/vgabios.c
+++ b/vgasrc/vgabios.c
@@ -17,7 +17,7 @@
#include "vgabios.h" // find_vga_entry
#include "optionroms.h" // struct pci_data
#include "config.h" // CONFIG_*
-#include "stdvga.h" // vgahw_screen_disable
+#include "stdvga.h" // stdvga_screen_disable
#include "geodelx.h" // geodelx_init
#include "bochsvga.h" // bochsvga_init
@@ -61,20 +61,20 @@ call16_vgaint(u32 eax, u32 ebx)
static void
perform_gray_scale_summing(u16 start, u16 count)
{
- vgahw_screen_disable();
+ stdvga_screen_disable();
int i;
for (i = start; i < start+count; i++) {
u8 rgb[3];
- vgahw_get_dac_regs(GET_SEG(SS), rgb, i, 1);
+ stdvga_get_dac_regs(GET_SEG(SS), rgb, i, 1);
// intensity = ( 0.3 * Red ) + ( 0.59 * Green ) + ( 0.11 * Blue )
u16 intensity = ((77 * rgb[0] + 151 * rgb[1] + 28 * rgb[2]) + 0x80) >> 8;
if (intensity > 0x3f)
intensity = 0x3f;
- vgahw_set_dac_regs(GET_SEG(SS), rgb, i, 1);
+ stdvga_set_dac_regs(GET_SEG(SS), rgb, i, 1);
}
- vgahw_screen_enable();
+ stdvga_screen_enable();
}
static void
@@ -95,7 +95,7 @@ set_cursor_shape(u8 start, u8 end)
start = ((end + 1) * cheight / 8) - 2;
end = ((end + 1) * cheight / 8) - 1;
}
- vgahw_set_cursor_shape(start, end);
+ stdvga_set_cursor_shape(start, end);
}
static u16
@@ -130,7 +130,7 @@ set_cursor_pos(struct cursorpos cp)
u16 address = (SCREEN_IO_START(nbcols, nbrows, cp.page)
+ cp.x + cp.y * nbcols);
- vgahw_set_cursor_pos(address);
+ stdvga_set_cursor_pos(address);
}
static struct cursorpos
@@ -179,7 +179,7 @@ set_active_page(u8 page)
address = page * GET_GLOBAL(vmode_g->slength);
}
- vgahw_set_active_page(address);
+ stdvga_set_active_page(address);
// And change the BIOS page
SET_BDA(video_page, page);
@@ -193,13 +193,13 @@ set_active_page(u8 page)
static void
set_scan_lines(u8 lines)
{
- vgahw_set_scan_lines(lines);
+ stdvga_set_scan_lines(lines);
if (lines == 8)
set_cursor_shape(0x06, 0x07);
else
set_cursor_shape(lines - 4, lines - 3);
SET_BDA(char_height, lines);
- u16 vde = vgahw_get_vde();
+ u16 vde = stdvga_get_vde();
u8 rows = vde / lines;
SET_BDA(video_rows, rows - 1);
u16 cols = GET_BDA(video_cols);
@@ -376,25 +376,25 @@ vga_set_mode(u8 mode, u8 noclearmem)
// if palette loading (bit 3 of modeset ctl = 0)
if ((modeset_ctl & 0x08) == 0) { // Set the PEL mask
- vgahw_set_pel_mask(GET_GLOBAL(vmode_g->pelmask));
+ stdvga_set_pel_mask(GET_GLOBAL(vmode_g->pelmask));
// From which palette
u8 *palette_g = GET_GLOBAL(vmode_g->dac);
u16 palsize = GET_GLOBAL(vmode_g->dacsize) / 3;
// Always 256*3 values
- vgahw_set_dac_regs(get_global_seg(), palette_g, 0, palsize);
+ stdvga_set_dac_regs(get_global_seg(), palette_g, 0, palsize);
u16 i;
for (i = palsize; i < 0x0100; i++) {
static u8 rgb[3] VAR16;
- vgahw_set_dac_regs(get_global_seg(), rgb, i, 1);
+ stdvga_set_dac_regs(get_global_seg(), rgb, i, 1);
}
if ((modeset_ctl & 0x02) == 0x02)
perform_gray_scale_summing(0x00, 0x100);
}
- vgahw_set_mode(vmode_g);
+ stdvga_set_mode(vmode_g);
if (noclearmem == 0x00)
clear_screen(vmode_g);
@@ -593,13 +593,13 @@ handle_100a(struct bregs *regs)
static void
handle_100b00(struct bregs *regs)
{
- vgahw_set_border_color(regs->bl);
+ stdvga_set_border_color(regs->bl);
}
static void
handle_100b01(struct bregs *regs)
{
- vgahw_set_palette(regs->bl);
+ stdvga_set_palette(regs->bl);
}
static void
@@ -658,25 +658,25 @@ handle_101000(struct bregs *regs)
{
if (regs->bl > 0x14)
return;
- vgahw_set_single_palette_reg(regs->bl, regs->bh);
+ stdvga_set_single_palette_reg(regs->bl, regs->bh);
}
static void
handle_101001(struct bregs *regs)
{
- vgahw_set_overscan_border_color(regs->bh);
+ stdvga_set_overscan_border_color(regs->bh);
}
static void
handle_101002(struct bregs *regs)
{
- vgahw_set_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
+ stdvga_set_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
}
static void
handle_101003(struct bregs *regs)
{
- vgahw_toggle_intensity(regs->bl);
+ stdvga_toggle_intensity(regs->bl);
}
static void
@@ -684,45 +684,45 @@ handle_101007(struct bregs *regs)
{
if (regs->bl > 0x14)
return;
- regs->bh = vgahw_get_single_palette_reg(regs->bl);
+ regs->bh = stdvga_get_single_palette_reg(regs->bl);
}
static void
handle_101008(struct bregs *regs)
{
- regs->bh = vgahw_get_overscan_border_color();
+ regs->bh = stdvga_get_overscan_border_color();
}
static void
handle_101009(struct bregs *regs)
{
- vgahw_get_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
+ stdvga_get_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
}
static void noinline
handle_101010(struct bregs *regs)
{
u8 rgb[3] = {regs->dh, regs->ch, regs->cl};
- vgahw_set_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
+ stdvga_set_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
}
static void
handle_101012(struct bregs *regs)
{
- vgahw_set_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
+ stdvga_set_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
}
static void
handle_101013(struct bregs *regs)
{
- vgahw_select_video_dac_color_page(regs->bl, regs->bh);
+ stdvga_select_video_dac_color_page(regs->bl, regs->bh);
}
static void noinline
handle_101015(struct bregs *regs)
{
u8 rgb[3];
- vgahw_get_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
+ stdvga_get_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
regs->dh = rgb[0];
regs->ch = rgb[1];
regs->cl = rgb[2];
@@ -731,25 +731,25 @@ handle_101015(struct bregs *regs)
static void
handle_101017(struct bregs *regs)
{
- vgahw_get_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
+ stdvga_get_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
}
static void
handle_101018(struct bregs *regs)
{
- vgahw_set_pel_mask(regs->bl);
+ stdvga_set_pel_mask(regs->bl);
}
static void
handle_101019(struct bregs *regs)
{
- regs->bl = vgahw_get_pel_mask();
+ regs->bl = stdvga_get_pel_mask();
}
static void
handle_10101a(struct bregs *regs)
{
- vgahw_read_video_dac_state(®s->bl, ®s->bh);
+ stdvga_read_video_dac_state(®s->bl, ®s->bh);
}
static void
@@ -811,7 +811,7 @@ handle_101102(struct bregs *regs)
static void
handle_101103(struct bregs *regs)
{
- vgahw_set_text_block_specifier(regs->bl);
+ stdvga_set_text_block_specifier(regs->bl);
}
static void
@@ -978,7 +978,7 @@ handle_101231(struct bregs *regs)
static void
handle_101232(struct bregs *regs)
{
- vgahw_enable_video_addressing(regs->al);
+ stdvga_enable_video_addressing(regs->al);
regs->al = 0x12;
}
@@ -1157,7 +1157,7 @@ handle_101c01(struct bregs *regs)
u16 seg = regs->es;
void *data = (void*)(regs->bx+0);
if (flags & 1) {
- vgahw_save_state(seg, data);
+ stdvga_save_state(seg, data);
data += sizeof(struct saveVideoHardware);
}
if (flags & 2) {
@@ -1165,7 +1165,7 @@ handle_101c01(struct bregs *regs)
data += sizeof(struct saveBDAstate);
}
if (flags & 4)
- vgahw_save_dac_state(seg, data);
+ stdvga_save_dac_state(seg, data);
regs->al = 0x1c;
}
@@ -1176,7 +1176,7 @@ handle_101c02(struct bregs *regs)
u16 seg = regs->es;
void *data = (void*)(regs->bx+0);
if (flags & 1) {
- vgahw_restore_state(seg, data);
+ stdvga_restore_state(seg, data);
data += sizeof(struct saveVideoHardware);
}
if (flags & 2) {
@@ -1184,7 +1184,7 @@ handle_101c02(struct bregs *regs)
data += sizeof(struct saveBDAstate);
}
if (flags & 4)
- vgahw_restore_dac_state(seg, data);
+ stdvga_restore_dac_state(seg, data);
regs->al = 0x1c;
}
@@ -1281,7 +1281,7 @@ vga_post(struct bregs *regs)
{
debug_enter(regs, DEBUG_VGA_POST);
- vgahw_init();
+ stdvga_init();
if (CONFIG_VGA_GEODELX)
geodelx_init();
diff --git a/vgasrc/vgafb.c b/vgasrc/vgafb.c
index 3838303..c9a257a 100644
--- a/vgasrc/vgafb.c
+++ b/vgasrc/vgafb.c
@@ -8,7 +8,7 @@
#include "biosvar.h" // GET_BDA
#include "util.h" // memset_far
#include "vgabios.h" // find_vga_entry
-#include "stdvga.h" // vgahw_grdc_write
+#include "stdvga.h" // stdvga_grdc_write
/****************************************************************
@@ -57,15 +57,15 @@ scroll_pl4(struct vgamode_s *vmode_g, int nblines, int attr
int cols = lr.x - ul.x + 1;
int rows = lr.y - ul.y + 1;
if (nblines < rows) {
- vgahw_grdc_write(0x05, 0x01);
+ stdvga_grdc_write(0x05, 0x01);
dest_far = memcpy_stride(SEG_GRAPH, dest_far, src_far, cols, stride
, (rows - nblines) * cheight);
}
if (attr < 0)
attr = 0;
- vgahw_grdc_write(0x05, 0x02);
+ stdvga_grdc_write(0x05, 0x02);
memset_stride(SEG_GRAPH, dest_far, attr, cols, stride, nblines * cheight);
- vgahw_grdc_write(0x05, 0x00);
+ stdvga_grdc_write(0x05, 0x00);
}
static void
@@ -203,19 +203,19 @@ write_gfx_char_pl4(struct vgamode_s *vmode_g
}
u16 addr = cp.x + cp.y * cheight * nbcols;
u16 src = ca.car * cheight;
- vgahw_sequ_write(0x02, 0x0f);
- vgahw_grdc_write(0x05, 0x02);
+ stdvga_sequ_write(0x02, 0x0f);
+ stdvga_grdc_write(0x05, 0x02);
if (ca.attr & 0x80)
- vgahw_grdc_write(0x03, 0x18);
+ stdvga_grdc_write(0x03, 0x18);
else
- vgahw_grdc_write(0x03, 0x00);
+ stdvga_grdc_write(0x03, 0x00);
u8 i;
for (i = 0; i < cheight; i++) {
u8 *dest_far = (void*)(addr + i * nbcols);
u8 j;
for (j = 0; j < 8; j++) {
u8 mask = 0x80 >> j;
- vgahw_grdc_write(0x08, mask);
+ stdvga_grdc_write(0x08, mask);
GET_FARVAR(SEG_GRAPH, *dest_far);
if (GET_GLOBAL(fdata_g[src + i]) & mask)
SET_FARVAR(SEG_GRAPH, *dest_far, ca.attr & 0x0f);
@@ -223,9 +223,9 @@ write_gfx_char_pl4(struct vgamode_s *vmode_g
SET_FARVAR(SEG_GRAPH, *dest_far, 0x00);
}
}
- vgahw_grdc_write(0x08, 0xff);
- vgahw_grdc_write(0x05, 0x00);
- vgahw_grdc_write(0x03, 0x00);
+ stdvga_grdc_write(0x08, 0xff);
+ stdvga_grdc_write(0x05, 0x00);
+ stdvga_grdc_write(0x03, 0x00);
}
static void
@@ -408,15 +408,15 @@ vgafb_write_pixel(u8 color, u16 x, u16 y)
case PLANAR1:
addr_far = (void*)(x / 8 + y * GET_BDA(video_cols));
mask = 0x80 >> (x & 0x07);
- vgahw_grdc_write(0x08, mask);
- vgahw_grdc_write(0x05, 0x02);
+ stdvga_grdc_write(0x08, mask);
+ stdvga_grdc_write(0x05, 0x02);
data = GET_FARVAR(SEG_GRAPH, *addr_far);
if (color & 0x80)
- vgahw_grdc_write(0x03, 0x18);
+ stdvga_grdc_write(0x03, 0x18);
SET_FARVAR(SEG_GRAPH, *addr_far, color);
- vgahw_grdc_write(0x08, 0xff);
- vgahw_grdc_write(0x05, 0x00);
- vgahw_grdc_write(0x03, 0x00);
+ stdvga_grdc_write(0x08, 0xff);
+ stdvga_grdc_write(0x05, 0x00);
+ stdvga_grdc_write(0x03, 0x00);
break;
case CGA:
if (GET_GLOBAL(vmode_g->pixbits) == 2)
@@ -466,7 +466,7 @@ vgafb_read_pixel(u16 x, u16 y)
mask = 0x80 >> (x & 0x07);
attr = 0x00;
for (i = 0; i < 4; i++) {
- vgahw_grdc_write(0x04, i);
+ stdvga_grdc_write(0x04, i);
data = GET_FARVAR(SEG_GRAPH, *addr_far) & mask;
if (data > 0)
attr |= (0x01 << i);
--
1.7.6.4
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