[SeaBIOS] [RFC PATCH v4 14/30] piix_pci: Add i440fx dram controller initialization

[Vasilis Liaskovitis]

Also introduce function to adjust memory map for hotplug-able dimms.

Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis at profitbricks.com>
---
 hw/pc_piix.c  |    6 +++---
 hw/piix_pci.c |   30 ++++++++++++++++++++++++++++--
 2 files changed, 31 insertions(+), 5 deletions(-)

diff --git a/hw/pc_piix.c b/hw/pc_piix.c
index 6a9b508..fe995b9 100644
--- a/hw/pc_piix.c
+++ b/hw/pc_piix.c
@@ -95,9 +95,9 @@ static void pc_init1(MemoryRegion *system_memory,
         kvmclock_create();
     }
 
-    if (ram_size >= 0xe0000000 ) {
-        above_4g_mem_size = ram_size - 0xe0000000;
-        below_4g_mem_size = 0xe0000000;
+    if (ram_size >= I440FX_PCI_HOLE_START) {
+        above_4g_mem_size = ram_size - I440FX_PCI_HOLE_START;
+        below_4g_mem_size = I440FX_PCI_HOLE_START;
     } else {
         above_4g_mem_size = 0;
         below_4g_mem_size = ram_size;
diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index 7ca3c73..9866b1d 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -125,6 +125,25 @@ static const VMStateDescription vmstate_i440fx = {
     }
 };
 
+hwaddr i440fx_pmc_dimm_offset(DeviceState *dev, uint64_t size)
+{
+    PCII440FXState *d = I440FX_PCI_DEVICE(dev);
+    hwaddr ret;
+
+    /* if dimm fits before pci hole, append it normally */
+    if (d->below_4g_mem_size + size <= I440FX_PCI_HOLE_START) {
+        ret = d->below_4g_mem_size;
+        d->below_4g_mem_size += size;
+    }
+    /* otherwise place it above 4GB */
+    else {
+        ret = 0x100000000LL + d->above_4g_mem_size;
+        d->above_4g_mem_size += size;
+    }
+
+    return ret;
+}
+
 static void i440fx_pcihost_initfn(Object *obj)
 {
     I440FXState *s = I440FX_HOST_DEVICE(obj);
@@ -148,8 +167,8 @@ static int i440fx_pcihost_init(SysBusDevice *dev)
     sysbus_add_io(dev, 0xcfc, &pci->data_mem);
     sysbus_init_ioports(&pci->busdev, 0xcfc, 4);
 
-    b = pci_bus_new(&s->parent_obj.busdev.qdev, NULL, s->mch.pci_address_space,
-                    s->mch.address_space_io, 0);
+    b = pci_bus_new(&s->parent_obj.busdev.qdev, "pci.0",
+            s->mch.pci_address_space, s->mch.address_space_io, 0);
     s->parent_obj.bus = b;
     qdev_set_parent_bus(DEVICE(&s->mch), BUS(b));
     qdev_init_nofail(DEVICE(&s->mch));
@@ -169,6 +188,13 @@ static int i440fx_initfn(PCIDevice *dev)
 
     pci_hole64_size = (sizeof(hwaddr) == 4 ? 0 :
                        ((uint64_t)1 << 62));
+
+    /* Initialize i440fx's DRAM channel, it can hold up to 8 DRAM ranks */
+    f->dram_channel0 = dimm_bus_create(OBJECT(f), "membus.0", 8,
+            i440fx_pmc_dimm_offset);
+    /* Initialize paravirtual memory bus */
+    f->pv_dram_channel = dimm_bus_create(OBJECT(f), "membus.pv", 0,
+            i440fx_pmc_dimm_offset);
     memory_region_init_alias(&f->pci_hole, "pci-hole", f->pci_address_space,
                              f->below_4g_mem_size,
                              0x100000000LL - f->below_4g_mem_size);
-- 
1.7.9