[SeaBIOS] [PATCH 4/5] ACPI: Move q35 PCI irq definitions together.

[Kevin O'Connor]

Place all the q35 irq definitions close to each other.

Signed-off-by: Kevin O'Connor <kevin at koconnor.net>
---
 src/q35-acpi-dsdt.dsl | 133 +++++++++++++++++++++++++-------------------------
 1 file changed, 67 insertions(+), 66 deletions(-)

diff --git a/src/q35-acpi-dsdt.dsl b/src/q35-acpi-dsdt.dsl
index 22b6d6b..5778a30 100644
--- a/src/q35-acpi-dsdt.dsl
+++ b/src/q35-acpi-dsdt.dsl
@@ -50,7 +50,6 @@ DefinitionBlock (
 
     /* PCI Bus definition */
     Scope(\_SB) {
-
         Device(PCI0) {
             Name(_HID, EisaId("PNP0A08"))
             Name(_CID, EisaId("PNP0A03"))
@@ -111,7 +110,72 @@ DefinitionBlock (
                 }
                 Return (Arg3)
             }
+        }
+    }
+
+#include "acpi-dsdt-pci-crs.dsl"
+#include "acpi-dsdt-hpet.dsl"
+
+    Scope(\_SB.PCI0) {
+        Device(VGA) {
+            Name(_ADR, 0x00010000)
+            Method(_S1D, 0, NotSerialized) {
+                Return (0x00)
+            }
+            Method(_S2D, 0, NotSerialized) {
+                Return (0x00)
+            }
+            Method(_S3D, 0, NotSerialized) {
+                Return (0x00)
+            }
+        }
+
+        /* PCI D31:f0 LPC ISA bridge */
+        Device(ISA) {
+            /* PCI D31:f0 */
+            Name(_ADR, 0x001f0000)
+
+            /* ICH9 PCI to ISA irq remapping */
+            OperationRegion(PIRQ, PCI_Config, 0x60, 0x0C)
+            Field(PIRQ, ByteAcc, NoLock, Preserve) {
+                PRQA,   8,
+                PRQB,   8,
+                PRQC,   8,
+                PRQD,   8,
+
+                Offset(0x08),
+                PRQE,   8,
+                PRQF,   8,
+                PRQG,   8,
+                PRQH,   8
+            }
+
+            OperationRegion(LPCD, PCI_Config, 0x80, 0x2)
+            Field(LPCD, AnyAcc, NoLock, Preserve) {
+                COMA,   3,
+                    ,   1,
+                COMB,   3,
+
+                Offset(0x01),
+                LPTD,   2,
+                    ,   2,
+                FDCD,   2
+            }
+            OperationRegion(LPCE, PCI_Config, 0x82, 0x2)
+            Field(LPCE, AnyAcc, NoLock, Preserve) {
+                CAEN,   1,
+                CBEN,   1,
+                LPEN,   1,
+                FDEN,   1
+            }
+        }
+    }
+
+#include "acpi-dsdt-isa.dsl"
 
+    /* PCI IRQs */
+    Scope(\_SB) {
+        Scope(PCI0) {
 #define prt_slot_lnk(nr, lnk0, lnk1, lnk2, lnk3)  \
     Package() { nr##ffff, 0, lnk0, 0 },           \
     Package() { nr##ffff, 1, lnk1, 0 },           \
@@ -144,7 +208,7 @@ DefinitionBlock (
 #define prt_slot_gsiG(nr) prt_slot_gsi(nr, GSIG, GSIH, GSIE, GSIF)
 #define prt_slot_gsiH(nr) prt_slot_gsi(nr, GSIH, GSIE, GSIF, GSIG)
 
-            NAME(PRTP, package() {
+            Name(PRTP, package() {
                 prt_slot_lnkE(0x0000),
                 prt_slot_lnkF(0x0001),
                 prt_slot_lnkG(0x0002),
@@ -185,7 +249,7 @@ DefinitionBlock (
                 prt_slot_lnkA(0x001f)
             })
 
-            NAME(PRTA, package() {
+            Name(PRTA, package() {
                 prt_slot_gsiE(0x0000),
                 prt_slot_gsiF(0x0001),
                 prt_slot_gsiG(0x0002),
@@ -238,70 +302,7 @@ DefinitionBlock (
                 }
             }
         }
-    }
-
-#include "acpi-dsdt-pci-crs.dsl"
-#include "acpi-dsdt-hpet.dsl"
-
-    Scope(\_SB.PCI0) {
-        Device(VGA) {
-            Name(_ADR, 0x00010000)
-            Method(_S1D, 0, NotSerialized) {
-                Return (0x00)
-            }
-            Method(_S2D, 0, NotSerialized) {
-                Return (0x00)
-            }
-            Method(_S3D, 0, NotSerialized) {
-                Return (0x00)
-            }
-        }
-
-        /* PCI D31:f0 LPC ISA bridge */
-        Device(ISA) {
-            /* PCI D31:f0 */
-            Name(_ADR, 0x001f0000)
-
-            /* ICH9 PCI to ISA irq remapping */
-            OperationRegion(PIRQ, PCI_Config, 0x60, 0x0C)
-            Field(PIRQ, ByteAcc, NoLock, Preserve) {
-                PRQA,   8,
-                PRQB,   8,
-                PRQC,   8,
-                PRQD,   8,
-
-                Offset(0x08),
-                PRQE,   8,
-                PRQF,   8,
-                PRQG,   8,
-                PRQH,   8
-            }
-
-            OperationRegion(LPCD, PCI_Config, 0x80, 0x2)
-            Field(LPCD, AnyAcc, NoLock, Preserve) {
-                COMA,   3,
-                    ,   1,
-                COMB,   3,
-
-                Offset(0x01),
-                LPTD,   2,
-                    ,   2,
-                FDCD,   2
-            }
-            OperationRegion(LPCE, PCI_Config, 0x82, 0x2)
-            Field(LPCE, AnyAcc, NoLock, Preserve) {
-                CAEN,   1,
-                CBEN,   1,
-                LPEN,   1,
-                FDEN,   1
-            }
-        }
-    }
 
-#include "acpi-dsdt-isa.dsl"
-
-    /* PCI IRQs */
-    Scope(\_SB) {
 #define define_link(link, uid, reg)                             \
         Device(link) {                                          \
             Name(_HID, EISAID("PNP0C0F"))                       \
-- 
1.7.11.7