[SeaBIOS] [RFC PATCH 0/9] ACPI memory hotplug
vasilis.liaskovitis at profitbricks.com
Mon Apr 23 14:31:15 CEST 2012
On Sun, Apr 22, 2012 at 05:20:59PM +0300, Gleb Natapov wrote:
> On Sun, Apr 22, 2012 at 05:13:27PM +0300, Avi Kivity wrote:
> > On 04/22/2012 05:09 PM, Gleb Natapov wrote:
> > > On Sun, Apr 22, 2012 at 05:06:43PM +0300, Avi Kivity wrote:
> > > > On 04/22/2012 04:56 PM, Gleb Natapov wrote:
> > > > > start. We will need it for migration anyway.
> > > > >
> > > > > > hotplug-able memory slots i.e. initial system memory is not modeled with
> > > > > > memslots. The concept could be generalized to include all memory though, or it
> > > > > > could more closely follow kvm-memory slots.
> > > > > OK, I hope final version will allow for memory < 4G to be hot-pluggable.
> > > >
> > > > Why is that important?
> > > >
> > > Because my feeling is that people that want to use this kind of feature
> > > what to start using it with VMs smaller than 4G. Of course not all
> > > memory have to be hot unpluggable. Making first 1M or event first 128M not
> > > unpluggable make perfect sense.
> > Can't you achieve this with -m 1G, -device dimm,size=1G,populated=true
> > -device dimm,size=1G,populated=false?
> From this:
> (for hw/pc.c PCI hole is currently [below_4g_mem_size, 4G), so
> hotplugged memory should start from max(4G, above_4g_mem_size).
> I understand that hotpluggable memory can start from above 4G only. With
> the config above we will have memory hole from 1G to PCI memory hole.
> May be not a big problem, but I do not see technical reason for the constrain.
The 440fx spec mentions: "The address range from the top of main DRAM to 4
Gbytes (top of physical memory space supported by the 440FX PCIset) is normally
mapped to PCI. The PMC forwards all accesses within this address range to PCI."
What we probably want is that the initial memory map creation takes into account
all dimms specified (both populated/unpopulated)
So "-m 1G, -device dimm,size=1G,populated=true -device dimm,size=1G,populated=false"
would create a system map with top of memory and start of PCI-hole at 2G.
This may require some shifting of physical address offsets around
3.5GB-4GB - is this the minimum PCI hole allowed?
E.g. if we specify 4x1GB DIMMs (onlt the first initially populated)
-m 1G, -device dimm,size=1G,populated=true -device dimm,size=1G,populated=false
-device dimm,size=1G,populated=false -device dimm,size=1G,populated=false
we create the following memory map:
dimm1: [1G, 2G)
dimm2: [2G, 3G)
dimm3: [4G, 5G) or dimm3 is split into [3G, 3.5G) and [4G, 4.5G)
does either of these options sound reasonable?
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