[SeaBIOS] [PATCH] Consider a VGA to be active if it responds to either IO or memory access
Ian.Campbell at eu.citrix.com
Fri May 27 10:44:59 CEST 2011
On Fri, 2011-05-27 at 01:59 +0100, Kevin O'Connor wrote:
> On Thu, May 26, 2011 at 03:43:28PM +0100, Ian Campbell wrote:
> > Under Xen the VGA card ends up configured for memory access only.
> That's odd. How does the vga bios work if the Xen VGA device doesn't
> handle inb/outb accesses?
I'm not entirely sure, but it does...
The Xen VGA device is the Cirrus GD 5446 provided by qemu. The I/O ports
are the VGA control registers at 0x3xx which are not covered by any PCI
BARS (FWIW this device has no I/O BARS, and two memory BARS).
It's not obvious whether the I/O space enable bit in the PCI cfg command
register is supposed to control the availability of non-PCI registers or
not. Neither the PCI spec nor the GD-5446 datasheet are particularly
clear on the matter.
I've just discovered that the ancient pentium box I use as a home
firewall has a GD 5446 in it (useful to know!), it doesn't have any I/O
BARS but it does have the I/O bit set in the PCI command register.
It's not clear who was responsible for setting that bit, in general in
the absence of an I/O BAR the BIOS wouldn't know to do so. I expect that
either the VGA BIOS is expected to enable it if the hardware it drives
requires it or that BIOSen special case class=VGA devices and always
enable I/O for one of them.
It looks like coreboot always forces this bit on for the VGA device
which it determines to be the primary, which is good enough for me --
I'll make a patch to the Xen pci setup code to implement that instead of
this change to SeaBIOS.
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