[SeaBIOS] [PATCH] Add config option to disable MTRRinitialization.

Sebastian Herbszt herbszt at gmx.de
Tue Mar 15 23:29:21 CET 2011


Sebastian Herbszt wrote:
> Kevin O'Connor wrote:
>> On Thu, Mar 10, 2011 at 10:50:30PM +0100, Sebastian Herbszt wrote:
>>> Kevin O'Connor wrote:
>>> >On Mon, Mar 07, 2011 at 09:37:59PM +0100, Sebastian Herbszt wrote:
>>> >>Kevin O'Connor wrote:
>>> >>>Some versions of Bochs don't like the MTRR initialization, so add
>>> >I ran into it with the version fc14 has - Bochs v2.4.5.  I get:
>>> >
>>> >00034041578i[CPU0 ] 0x01fe28e9>> wrmsr  : 0F30
>>> >00034041578e[CPU0 ] exception(): 3rd (13) exception with no resolution, shutdown status is 00h, resetting
>>> >00034041578i[SYS  ] bx_pc_system_c::Reset(HARDWARE) called
>>> >00034041578i[CPU0 ] cpu hardware reset
>>> >
>>> >and then the boot restarts.  The issue goes away if I disable the MTRR
>>> >init.
>>> Can you please post your "cpuid" lines from your bochsrc file and
>>> the CPU configuration related lines from the top of the bochsout.txt
>>> file?
>> 
>> I don't have a bochsrc - I just run:
>> 
>> bochs -q 'floppya: 1_44=odin1440.img, status=inserted' 'romimage: file=../seabios/out/bios.bin'
>> 
>> and then select option '6'.  Below is the system config output:
>> 
>> 00000000000i[     ] Bochs x86 Emulator 2.4.5.cvs
>> 00000000000i[     ]   Build from CVS snapshot, after release 2.4.5
>> 00000000000i[     ] System configuration
>> 00000000000i[     ]   processors: 1 (cores=1, HT threads=1)
>> 00000000000i[     ]   A20 line support: yes
>> 00000000000i[     ] CPU configuration
>> 00000000000i[     ]   level: 6
>> 00000000000i[     ]   SMP support: no
>> 00000000000i[     ]   APIC support: yes
>> 00000000000i[     ]   FPU support: yes
>> 00000000000i[     ]   MMX support: yes
>> 00000000000i[     ]   3dnow! support: yes
>> 00000000000i[     ]   SEP support: yes
>> 00000000000i[     ]   SSE support: sse2
>> 00000000000i[     ]   XSAVE support: no
>> 00000000000i[     ]   AES support: no
>> 00000000000i[     ]   MOVBE support: no
>> 00000000000i[     ]   x86-64 support: no
>> 00000000000i[     ]   MWAIT support: no
>> 00000000000i[     ]   VMX support: no
>> 
>> -Kevin
> 
> Stanislav, you happen to know why WRMSR is not recognized here?

I was now able to reproduce it:

00000449408i[BIOS ] init mtrr
00023940129e[CPU0 ] WRMSR[0x00000201]: attempt to write invalid phy addr to variable range MTRR 0000000f:e0000800
00023940129e[CPU0 ] interrupt(): vector must be within IDT table limits, IDT.limit = 0x0
00023940129e[CPU0 ] interrupt(): vector must be within IDT table limits, IDT.limit = 0x0
00023940129i[CPU0 ] CPU is in protected mode (active)
00023940129i[CPU0 ] CS.d_b = 32 bit
00023940129i[CPU0 ] SS.d_b = 32 bit
00023940129i[CPU0 ] | EAX=e0000800  EBX=00000201  ECX=00000201  EDX=0000000f
00023940129i[CPU0 ] | ESP=00006eec  EBP=00000008  ESI=0000000f  EDI=00000210
00023940129i[CPU0 ] | IOPL=0 id vip vif ac vm RF nt of df if tf sf zf af pf cf
00023940129i[CPU0 ] | SEG selector     base    limit G D
00023940129i[CPU0 ] | SEG sltr(index|ti|rpl)     base    limit G D
00023940129i[CPU0 ] |  CS:0008( 0001| 0|  0) 00000000 ffffffff 1 1
00023940129i[CPU0 ] |  DS:0010( 0002| 0|  0) 00000000 ffffffff 1 1
00023940129i[CPU0 ] |  SS:0010( 0002| 0|  0) 00000000 ffffffff 1 1
00023940129i[CPU0 ] |  ES:0010( 0002| 0|  0) 00000000 ffffffff 1 1
00023940129i[CPU0 ] |  FS:0010( 0002| 0|  0) 00000000 ffffffff 1 1
00023940129i[CPU0 ] |  GS:0010( 0002| 0|  0) 00000000 ffffffff 1 1
00023940129i[CPU0 ] | EIP=01fe1bd2 (01fe1bd2)
00023940129i[CPU0 ] | CR0=0x00000011 CR2=0x00000000
00023940129i[CPU0 ] | CR3=0x00000000 CR4=0x00000000
00023940129i[CPU0 ] 0x01fe1bd2>> wrmsr  : 0F30
00023940129e[CPU0 ] exception(): 3rd (13) exception with no resolution, shutdown status is 00h, resetting

It happens because your Bochs 2.4.5 version was compiled without x86-64 support and --enable-long-phy-address
and only supports 32-bit phys_bits. You can recompile it or upgrade to 2.4.6 to fix this.

Sebastian




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