[SeaBIOS] [Qemu-devel] [RFC PATCH 01/13] Generic DMA memory access interface

Richard Henderson rth at twiddle.net
Wed Jun 1 17:09:29 CEST 2011

On 06/01/2011 07:52 AM, Eduard - Gabriel Munteanu wrote:
> The main selling point is there are more chances to screw up if every
> bus layer implements these manually. And it's really convenient,
> especially if we get to add another ld/st.

If we drop the ld/st, we're talking about 5 lines for every bus layer.

If I recall, there was just the one driver that actually uses the ld/st
interface; most used the read/write interface.

> If I understand correctly you need some sort of shared state between
> IOMMUs or units residing on different buses. Then you should be able to
> get to it even with this API, just like I do with my AMD IOMMU state by
> upcasting. It doesn't seem to matter whether you've got an opaque, that
> opaque could very well be reachable by upcasting.
> Did I get this wrong?

Can you honestly tell me that 

> +static int amd_iommu_translate(DMADevice *dev,
> +                               dma_addr_t addr,
> +                               dma_addr_t *paddr,
> +                               dma_addr_t *len,
> +                               int is_write)
> +{
> +    PCIDevice *pci_dev = container_of(dev, PCIDevice, dma);
> +    PCIDevice *iommu_dev = DO_UPCAST(PCIDevice, qdev, dev->mmu->iommu);
> +    AMDIOMMUState *s = DO_UPCAST(AMDIOMMUState, dev, iommu_dev);

THREE (3) upcasts is a sane to write maintainable software?
The margin for error here is absolutely enormous.

If you had just passed in that AMDIOMMUState* as the opaque
value, it would be trivial to look at the initialization
statement and the callback function to verify that the right
value is being passed.


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