[SeaBIOS] A question on SeaBIOS PCI Enumeration

[Prasad Joshi]

Hello,

I am working on QEMU to pass-through a graphics device. I noticed few
problems with PCI enumeration hence I compiled SeaBIOS with more debug
information.

The PCI enumeration problem seems to be related to BUILS_PCIMEM_SIZE. I keep
on getting the error 'increase BUILD_PCIMEM_SIZE and recompile'. This
happens when BIOS tries to allocate 128MB for one of the BAR. The code seems
to be printing the correct error as, the 128MB naturally aligned memory
request can not be satisfied. No problem with this.

As I notice on my host machine the same case happens, but host BIOS seems to
be allocating 128MB memory from some other region (c0000000-c7ffffff)

02:00.0 VGA compatible controller: ATI Technologies Inc RV370 5B64 [FireGL
V3100 (PCIE)] (rev 80) (prog-if 00 [VGA controller])
    Region 0: Memory at c0000000 (32-bit, prefetchable) [size=128M]
    Region 1: I/O ports at a000 [size=256]
    Region 2: Memory at f9cf0000 (32-bit, non-prefetchable) [size=64K]
    Expansion ROM at f9cc0000 [disabled] [size=128K]

prasad at prasad-kvm:~$ grep '0000:02' /proc/iomem
  c0000000-c7ffffff : PCI Bus 0000:02
    c0000000-c7ffffff : 0000:02:00.0
  f9c00000-f9cfffff : PCI Bus 0000:02
    f9cc0000-f9cdffff : 0000:02:00.0
    f9ce0000-f9ceffff : 0000:02:00.1
    f9cf0000-f9cfffff : 0000:02:00.0

Can SeaBIOS do the same thing? or to put in other words Can SeaBIOS allocate
memory from some other region instead of fixed f0000000 to (0xfec00000-1)?

Thanks and Regards,
Prasad
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.seabios.org/pipermail/seabios/attachments/20110207/61e88580/attachment.html>