[SeaBIOS] [Qemu-devel] [PATCH 3/3] Changes related to secondary buses and 64bit regions

[Kevin O'Connor]

On Wed, Dec 28, 2011 at 01:43:02PM +0200, Michael S. Tsirkin wrote:
> On Wed, Dec 28, 2011 at 06:35:55PM +1300, Alexey Korolev wrote:
> > All devices behind a bridge need to have all their regions consecutive and
> > not overlapping with all the normal memory ranges.
> > Since prefetchable memory is described by one record, we must avoid the situations
> > when 32bit and 64bit prefetchable regions are present within one secondary bus.
> 
> How do we avoid this? Assume we have two devices:
> a 32 bit and a 64 bit one, behind a bridge.
> There are two main things we can do:
> 1. Make the 64 bit device only use the low 32 bit
> 2. Put the 32 bit one in the non-prefetcheable range

I would vote for option 1.  Supporting option 2 seems complex and it
would only help the case where there is a large 64bit prefmem bar
(that can't reliably fit in low memory) behind a bridge that supports
64bit prefmem bars that also has a small 32bit prefmem bar (which can
reliably fit in low memory) behind it.  This condition seems too
unlikely to be worth supporting the additional complexity.

-Kevin