[SeaBIOS] [PATCH v2] Make pci memory window configurable.

Isaku Yamahata yamahata at valinux.co.jp
Fri Apr 29 15:02:27 CEST 2011


On Fri, Apr 29, 2011 at 11:25:26AM +0200, Gerd Hoffmann wrote:
>   Hi,
>
>>> Is there any reason why there is a fixed split, other than making the
>>> code simpler (i.e. need only one instead of two passes over all pci
>>> devices)?
>>
>> Because pci-to-pci bridge handles memory access and preferchable memory
>> access differently.
>
> Sure.  The reason for the two regions is clear.  But we could still  
> calculate the size at runtime I think.  i.e. do one pass, figure how  
> much bars with which sizes we have for each type, calculate the window  
> sizes we'll need, then do a second pass and map the pci regions.  That  
> would also allow to pack the regions better.

Oh, I see. It's just for code simplicity.
When I discussed with Keven about the two(or more) path way,
Kevin didn't require it. So I only added overlap check and didn't
implemented smarter way with multi path.

Please refer to
http://www.seabios.org/pipermail/seabios/2010-June/000694.html
http://www.seabios.org/pipermail/seabios/2010-June/000697.html

If we go for multi path way, we can check the top of the low memory
calculate BUILD_PCIMEM_START dynamically so that larger area can
be used.

One another trick to pack area is to sort BARs in descending order
by its size for alignment requirement. This is well-known trick.

thanks,
-- 
yamahata



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