[SeaBIOS] [PATCH v2] Make pci memory window configurable.

[Isaku Yamahata]

On Fri, Apr 29, 2011 at 09:37:05AM +0200, Gerd Hoffmann wrote:
> On 04/29/11 02:41, Kevin O'Connor wrote:
>> On Thu, Apr 28, 2011 at 08:28:40PM -0400, Kevin O'Connor wrote:
>> [...]
>>> I think it would be better to define the kconfig variables needed (eg,
>>> PCIMEM_START, PCIMEM_SIZE, PCIMEM_PREFMEM_SIZE) [...]
>>
>> Hrmm - on second thought, we know the PCI range should end at
>> 0xfec00000, so I think kconfig only really needs to ask for
>> PCIMEM_SIZE and PCIMEM_PREFMEM_SIZE.
>
> I think it is better to ask for the start address, then calculate the  
> memory window size like the patch does as the size is a odd value  
> (0x0ec00000) and I guess for most people it isn't obvious why ...
>
> In case we have a separate window prefetchable memory we'll need one of  
> the sizes too (then calculate the other).
>
> Is there any reason why there is a fixed split, other than making the  
> code simpler (i.e. need only one instead of two passes over all pci  
> devices)?

Because pci-to-pci bridge handles memory access and preferchable memory 
access differently. They are filtered by memory base/limit register and
preferchable memory base/limit register.
So in order to support multi pci buses, memory and preferchable memory
needs to be handled separately.

I guess you're familiar with Linux kernel. Linux kernel also does so.
linux/drivers/pci/setup-bus.c has pci_setup_bridge_mmio() and
pci_setup_bridge_mmio_pref()

thanks,
-- 
yamahata