[SeaBIOS] Running out of space in e/f-segments

[Carl-Daniel Hailfinger]

On 22.08.2010 19:02, Kevin O'Connor wrote:
> I'm not sure what you mean by "4G-2M" - are you suggesting running XIP
> in the "flash" chip?  This is possible in qemu/kvm, but it's not
> something you'd want to do on real hardware.  Accesses to the flash
> chip are terribly slow - on real hardware you want to copy the code
> from flash to ram as soon as possible.

If you can switch on caching for the flash area and do it correctly, why
would it be slow during POST?
Of course you have to switch off caching of flash once you pass control
to the bootloader, and then flash will be slow, but for initial POST it
should work fine.


> (You typically want to
> compress everything in flash also.)
>   

Of course that's indeed a compelling argument.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/