[SeaBIOS] Seabios: PCI interrupt routing question
kevin at koconnor.net
Thu Dec 24 01:27:40 CET 2009
On Mon, Dec 14, 2009 at 10:23:39AM +0100, Magnus Christensson wrote:
>> This function implement the same logic as pci_swizzle_interrupt_pin() in
>> Linux kernel. This logic defines how PCI bridge connects INTx of each
>> devices behind it to system board interrupt line and it is part of PCI
>> spec (page 30 of PCI3.0 spec). Note that the function return pin, not
>> interrupt line. To get interrupt line we look into pci_irqs array.
> The swizzling of INTx-pins happens in PCI-to-PCI bridges. But it looks
> like the pci_slot_get_pirq function is applied to all devices, including
> those on the top-level bus that are not behind any PCI-to-PCI bridge.
> Further, the function only looks at device (slot) and doesn't care where
> the device is in the PCI hierarchy.
The pci_slot_get_pirq() appears to be taken directly from
hw/piix_pci.c in the qemu source. So, it represents the "motherboard"
mapping of irq lines on bus 0.
Note, the mapping isn't the same as the swizzling of PCI-to-PCI
bridges - on a pci bridge, INTA# of device 0 would map to the upstream
INTA# pin, but the pci_slot_get_pirq() would actually map it to INTD#.
The code is in line with the ACPI mapping in src/acpi-dsdt.dsl and the
PIR mapping in src/pirtable.c.
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