[openfirmware] [commit] r3185 - cpu/arm/marvell cpu/arm/mmp2 cpu/arm/mmp3 cpu/arm/olpc cpu/arm/olpc/3.0 dev/usb2/hcd/ehci

repository service svn at openfirmware.info
Fri Aug 17 01:25:01 CEST 2012


Author: wmb
Date: Fri Aug 17 01:25:00 2012
New Revision: 3185
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3185

Log:
OLPC ARM - Added USB properties.

Modified:
   cpu/arm/marvell/utmiphy.fth
   cpu/arm/mmp2/ulpiphy.fth
   cpu/arm/mmp3/usb2phy.fth
   cpu/arm/olpc/3.0/usb.fth
   cpu/arm/olpc/usb.fth
   dev/usb2/hcd/ehci/ehci.fth

Modified: cpu/arm/marvell/utmiphy.fth
==============================================================================
--- cpu/arm/marvell/utmiphy.fth	Thu Aug 16 22:17:14 2012	(r3184)
+++ cpu/arm/marvell/utmiphy.fth	Fri Aug 17 01:25:00 2012	(r3185)
@@ -1,6 +1,13 @@
 \ See license at end of file
 purpose: Init UTMI USB Phy in Marvell SoC
 
+0 0   " d4207000"  " /" begin-package
+
+" usb2-phy" device-name
+
+my-address my-space h# 100 reg
+" mrvl,mmp2-utmiphy" +compatible
+   
 : +utmi  ( offset -- offset' )  h# 20.7000 +  ;
 
 h# 04 +utmi constant utmi-ctrl
@@ -36,7 +43,7 @@
 h# 0000.00f0 value rx-clr   \ RX_SQ_THRESH
 h# 0000.00a0 value rx-set   \            a
 
-: init-usb-phy  ( -- )
+: init  ( -- )
 [ifdef] notdef
    ." Interacting before USB PHY init." cr
    ." Change pll-set, tx-set, rx-set as desired then type 'resume'" cr
@@ -83,3 +90,8 @@
 ;
 : enable-ulpi-phy  ( -- )  h# 100 utmi-ctl1 io-set  ;
 : select-ulpi-data  ( -- )  h# 200 utmi-ctl1 io-set  ;
+
+: open  ( -- true )  true  ;
+: close  ;
+
+end-package

Modified: cpu/arm/mmp2/ulpiphy.fth
==============================================================================
--- cpu/arm/mmp2/ulpiphy.fth	Thu Aug 16 22:17:14 2012	(r3184)
+++ cpu/arm/mmp2/ulpiphy.fth	Fri Aug 17 01:25:00 2012	(r3185)
@@ -1,6 +1,10 @@
 \ See license at end of file
 purpose: Access to miscellaneous control/enable registers for the ULPI PHY portion of the USB SPH controller
 
+0 0   " d4207000"  " /" begin-package
+
+" mrvl,mmp2-ulpiphy" +compatible
+
 h# 3800 io2-va + constant usbsph-misc-va
 : usbsph-misc@  ( -- n )  usbsph-misc-va     4 + l@  ;
 : usbsph-misc!  ( n -- )  usbsph-misc-va     4 + l!  ;
@@ -13,6 +17,17 @@
 : ulpi-clock-on  ( -- )  usbsph-ctrl@ 1 or usbsph-ctrl!  ;
 : ulpi-clock-select  ( -- )  usbsph-ctrl@ h# 400 or usbsph-ctrl!  ;
 
+: init  ( -- )
+   ulpi-clock-on
+   ulpi-clock-select
+   ulpi-on
+;
+
+: open  ( -- true )  true  ;
+: close  ;
+
+end-package
+
 \ LICENSE_BEGIN
 \ Copyright (c) 2011 FirmWorks
 \ 

Modified: cpu/arm/mmp3/usb2phy.fth
==============================================================================
--- cpu/arm/mmp3/usb2phy.fth	Thu Aug 16 22:17:14 2012	(r3184)
+++ cpu/arm/mmp3/usb2phy.fth	Fri Aug 17 01:25:00 2012	(r3185)
@@ -1,6 +1,13 @@
 \ See license at end of file
 purpose: Init USB2 Phy in Marvell SoC
 
+0 0   " d4207000"  " /" begin-package
+
+" usb2-phy" device-name
+
+my-address my-space h# 100 reg
+" mrvl,mmp3-usb2phy" +compatible
+   
 : +usb2  ( offset -- offset' )  h# 20.7000 +  ;
 
   h# 04 +usb2 constant pll-reg0
@@ -36,7 +43,7 @@
    ." PLL calibrate timeout" cr
 ;
 
-: init-usb-phy  ( -- )
+: init  ( -- )
    h# f00  h# 100 +pmua  io-clr
 \  h# d00  h# 100 +pmua  io-set   \ Select 26 MHz VCXO clock
    h# 000  h# 100 +pmua  io-set   \ Select crystal
@@ -85,3 +92,8 @@
 
    d# 100 wait-cal
 ;
+
+: open  ( -- true )  true  ;
+: close  ;
+
+end-package

Modified: cpu/arm/olpc/3.0/usb.fth
==============================================================================
--- cpu/arm/olpc/3.0/usb.fth	Thu Aug 16 22:17:14 2012	(r3184)
+++ cpu/arm/olpc/3.0/usb.fth	Fri Aug 17 01:25:00 2012	(r3185)
@@ -17,6 +17,16 @@
       my-space swap  " map-in" $call-parent  h# 100 +  ( adr )
    ;
    : my-map-out  ( adr len -- )  swap h# 100 - swap " map-out" $call-parent  ;
+   " /pmua" encode-phandle d# 18 encode-int encode+ " clocks" property
+   d# 34 " interrupts" integer-property
+
+   " mrvl,mmp3-fsic" +compatible
+
+   " host" " dr_mode"  string-property
+   " ulpi" " phy_type" string_property
+
+   " /usb-phy" encode-phandle " transceiver" property
+
    false constant has-dbgp-regs?
    false constant needs-dummy-qh?
    : grab-controller  ( config-adr -- error? )  drop false  ;
@@ -42,9 +52,7 @@
 
 : (reset-usb-hub)  ( -- )
    d# 146 gpio-clr  d# 10 ms  d# 146 gpio-set  \ Resets ULPI hub
-   ulpi-clock-on
-   ulpi-clock-select
-   ulpi-on
+   " /usb2-phy" " init" execute-device-method
 ;
 ' (reset-usb-hub) to reset-usb-hub
 

Modified: cpu/arm/olpc/usb.fth
==============================================================================
--- cpu/arm/olpc/usb.fth	Thu Aug 16 22:17:14 2012	(r3184)
+++ cpu/arm/olpc/usb.fth	Fri Aug 17 01:25:00 2012	(r3185)
@@ -11,6 +11,14 @@
    " /pmua" encode-phandle 5 encode-int encode+ " clocks" property
    d# 44 " interrupts" integer-property
 
+   " mrvl,pxa-u2oehci"  +compatible
+   " mrvl,mmp3-u2oehci" +compatible
+
+   " host" " dr_mode"  string-property
+   " utmi" " phy_type" string-property
+
+   " /usb2-phy" encode-phandle " transceiver" property
+
    false constant has-dbgp-regs?
    false constant needs-dummy-qh?
    : grab-controller  ( config-adr -- error? )  drop false  ;
@@ -29,7 +37,7 @@
 : init-usb  ( -- )
    h# 9 h# 5c pmua!  \ Enable clock to USB block
    reset-usb-hub
-   init-usb-phy
+   " /usb2-phy" " init" execute-device-method drop
 ;
 
 stand-init: Init USB Phy

Modified: dev/usb2/hcd/ehci/ehci.fth
==============================================================================
--- dev/usb2/hcd/ehci/ehci.fth	Thu Aug 16 22:17:14 2012	(r3184)
+++ dev/usb2/hcd/ehci/ehci.fth	Fri Aug 17 01:25:00 2012	(r3185)
@@ -3,6 +3,8 @@
 
 " ehci" encode-string " device_type" property
 
+" usb-ehci" +compatible
+
 hex
 headers
 



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