[openfirmware] [commit] r3146 - cpu/arm/olpc
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Thu Aug 9 22:34:23 CEST 2012
Author: rsmith
Date: Thu Aug 9 22:34:22 2012
New Revision: 3146
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3146
Log:
OLPC CL4 - Fix slow EC programming speed
The pll trim values are in special locations rather than normal XDATA
locations. The XO-4 trim routine was using the wrong read method to
get the pll trim values.
Modified:
cpu/arm/olpc/edi.fth
Modified: cpu/arm/olpc/edi.fth
==============================================================================
--- cpu/arm/olpc/edi.fth Thu Aug 9 14:29:04 2012 (r3145)
+++ cpu/arm/olpc/edi.fth Thu Aug 9 22:34:22 2012 (r3146)
@@ -317,15 +317,15 @@
dup 4 or ecsts edi-b! ( old-ecsts ) \ chipid is now pllcfg2
xbis edi-b@ h# 3f and ( old-ecsts xbis-bits )
- h# 81 edi-b@ 3 and 6 lshift or ( old-ecsts xbis-value )
+ h# 81 trim@ 3 and 6 lshift or ( old-ecsts xbis-value )
xbis edi-b! ( old-ecsts )
- h# 82 edi-b@ h# f and 4 lshift ( old-ecsts pll-high )
- h# 83 edi-b@ h# f0 and 4 rshift or ( old-ecsts pll-value )
+ h# 82 trim@ h# f and 4 lshift ( old-ecsts pll-high )
+ h# 83 trim@ h# f0 and 4 rshift or ( old-ecsts pll-value )
pllcfg edi-b! ( old-ecsts )
pllcfg2 edi-b@ h# 3f and ( old-ecsts pll2-bits )
- h# 82 edi-b@ h# 30 and 2 lshift or ( old-ecsts pll2-value )
+ h# 82 trim@ h# 30 and 2 lshift or ( old-ecsts pll2-value )
pllcfg2 edi-b! ( old-ecsts )
ecsts edi-b! ( )
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