[openfirmware] [commit] r2565 - in cpu/arm: mmp2 olpc/1.75

repository service svn at openfirmware.info
Mon Oct 3 22:56:16 CEST 2011


Author: wmb
Date: Mon Oct  3 22:56:16 2011
New Revision: 2565
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2565

Log:
OLPC XO-1.75 - Moved register access words for SoC-level cross-function registers into a separate file.

Added:
   cpu/arm/mmp2/socregs.fth
Modified:
   cpu/arm/olpc/1.75/prefw.bth

Added: cpu/arm/mmp2/socregs.fth
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ cpu/arm/mmp2/socregs.fth	Mon Oct  3 22:56:16 2011	(r2565)
@@ -0,0 +1,27 @@
+\ See license at end of file
+purpose: Register access words for MMP2 registers used by many functional units
+
+: +io  ( offset -- va )  io-va +  ;
+: io!  ( value offset -- )  +io l!  ;
+: io@  ( offset -- value )  +io l@  ;
+
+: +apbc  ( offset -- io-offset )  h# 01.5000 +  ;  \ APB Clock Unit
+: +pmua  ( offset -- io-offset )  h# 28.2800 +  ;  \ CPU Power Management Unit
+: +mpmu  ( offset -- io-offset )  h# 05.0000 +  ;  \ Main Power Management Unit
+: +scu   ( offset -- io-offset )  h# 28.2c00 +  ;  \ System Control Unit
+: +icu   ( offset -- io-offset )  h# 28.2000 +  ;  \ Interrupt Controller Unit
+
+: io-set  ( mask offset -- )  dup io@  rot or  swap io!  ;
+: io-clr  ( mask offset -- )  dup io@  rot invert and  swap io!  ;
+
+: icu@  ( offset -- value )  +icu io@  ;
+: icu!  ( value offset -- )  +icu io!  ;
+
+: mpmu@  ( offset -- l )  +mpmu io@  ;
+: mpmu!  ( l offset -- )  +mpmu io!  ;
+
+: pmua@  ( offset -- l )  +pmua io@  ;
+: pmua!  ( l offset -- )  +pmua io!  ;
+
+: apbc@  ( offset -- l )  +apbc io@  ;
+: apbc!  ( l offset -- )  +apbc io!  ;

Modified: cpu/arm/olpc/1.75/prefw.bth
==============================================================================
--- cpu/arm/olpc/1.75/prefw.bth	Mon Oct  3 18:44:20 2011	(r2564)
+++ cpu/arm/olpc/1.75/prefw.bth	Mon Oct  3 22:56:16 2011	(r2565)
@@ -163,26 +163,7 @@
 
 fload ${BP}/forth/lib/selstr.fth
 
-\ : +io  ( offset -- va )  io-va +  ;
-: +io  ( offset -- va )  dup h# 0040.0000 >=  if  debug-me  then  io-va +  ;
-: io!  ( value offset -- )  +io l!  ;
-: io@  ( offset -- value )  +io l@  ;
-
-: +apbc  ( offset -- io-offset )  h# 01.5000 +  ;
-: +pmua  ( offset -- io-offset )  h# 28.2800 +  ;
-: +mpmu  ( offset -- io-offset )  h# 05.0000 +  ;
-: +scu   ( offset -- io-offset )  h# 28.2c00 +  ;
-: +icu   ( offset -- io-offset )  h# 28.2000 +  ;
-
-: io-set  ( mask offset -- )  dup io@  rot or  swap io!  ;
-: io-clr  ( mask offset -- )  dup io@  rot invert and  swap io!  ;
-
-
-: mpmu@  ( offset -- l )  +mpmu io@  ;
-: mpmu!  ( l offset -- )  +mpmu io!  ;
-
-: pmua@  ( offset -- l )  +pmua io@  ;
-: pmua!  ( l offset -- )  +pmua io!  ;
+fload ${BP}/cpu/arm/mmp2/socregs.fth   \ MMP2 registers used by many functional units
 
 fload ${BP}/cpu/arm/mmp2/hash.fth      \ Hashes - SHA1, SHA-256, MD5
 fload ${BP}/cpu/x86/pc/olpc/crypto.fth \ Cryptographic image validation



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