[openfirmware] [commit] r2135 - cpu/arm

[repository service]

Author: wmb
Date: Fri Jan 21 01:12:35 2011
New Revision: 2135
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2135

Log:
ARM - support movw in assembler, disassembler and simulator, support msr in simulator.

Modified:
   cpu/arm/armsim.c
   cpu/arm/assem.fth
   cpu/arm/disassem.fth

Modified: cpu/arm/armsim.c
==============================================================================
--- cpu/arm/armsim.c	Fri Jan 21 01:10:53 2011	(r2134)
+++ cpu/arm/armsim.c	Fri Jan 21 01:12:35 2011	(r2135)
@@ -496,7 +496,7 @@
            default:  UNIMP("BXTYPE"); break;
            } break;
 case 0x09: switch (BXTYPE) {
-           case 0x0: UNIMP("msr"); break;
+           case 0x0: INSTR("msr"); APSR.all = RM; break;
            case 0x1: INSTR("bx"); PC = RM; break;
            case 0x2: INSTR("bxj"); PC = RM; break;
            case 0x3: INSTR("blx"); if (LINK) LR = PC - 4; PC = RM; break;
@@ -805,7 +805,7 @@
 case 0x15: INSTR("adc"); ADC(RD, RN, IMM32, C); break;
 case 0x16: INSTR("sbc"); SBB(RD, IMM32, RN, C); break;
 case 0x17: INSTR("rsc"); SBB(RD, IMM32, RN, C); break;
-case 0x18: INSTR("mov"); RD = IMM16; break;
+case 0x18: INSTR("movw"); RD = IMM16; break;
 case 0x19: switch (BXTYPE) {
            case 0x0: INSTR("nop"); break;
            case 0x1:

Modified: cpu/arm/assem.fth
==============================================================================
--- cpu/arm/assem.fth	Fri Jan 21 01:10:53 2011	(r2134)
+++ cpu/arm/assem.fth	Fri Jan 21 01:12:35 2011	(r2135)
@@ -548,6 +548,18 @@
 : amode-rdop2  ( -- )  init-operands  get-r12 get-opr2  !op  ;
 : amode-rev    ( -- )  init-operands  get-r12 get-r00   !op  ;
 
+: set-imm16  ( n -- )
+   dup fff and  0 set-field
+   d# 12 >>  d# 16 set-field
+;
+: amode-movw   ( -- )
+   init-operands  get-r12  get-immediate      ( imm )
+   dup 0 10000 within  0=  if
+      " Immediate value won't fit in 16 bits" ad-error
+   then
+   set-imm16  !op
+;
+
 : amode-lsm  ( need-r16? -- )
    init-operands
    if
@@ -923,6 +935,7 @@
 : clz   016f.0f10 {cond/s} amode-rdop2  ;
 : mov   01a0.0000 {cond/s} amode-rdop2  ;
 : mvn   01e0.0000 {cond/s} amode-rdop2  ;
+: movw  0300.0000 {cond}   amode-movw   ;
 
 : mul   0000.0090 {cond/s} amode-mul   ;
 : mla   0020.0090 {cond/s} amode-mla   ;
@@ -988,7 +1001,7 @@
    get-register  >r              ( r: adr? reg# )
    get-immediate  r> r> rot      ( reg# adr? addr|imm )
    2dup swap  if                 ( reg# adr? addr|imm addr|imm )
-      here  >offset              ( reg# adr? addr|imm offset|imm )
+      here  >offset              ( reg# adr? addr|imm offset )
    then
    dup  fits?  if                ( reg# adr? addr|imm offset|imm )
       2drop  if
@@ -1004,7 +1017,11 @@
             true asm-const       ( reg# op )
          then
       else                       ( reg# imm imm )
-         drop false asm-const    ( reg# op )
+         0 1.0000 within  if     ( reg# imm )
+            set-imm16 0300.0000  ( reg# op )      \ movw rN,#<imm16>
+         else                    ( reg# imm )
+            false asm-const      ( reg# op )
+         then
       then                       ( reg# op )
    then                          ( reg# op )
    iop  rd-field  !op

Modified: cpu/arm/disassem.fth
==============================================================================
--- cpu/arm/disassem.fth	Fri Jan 21 01:10:53 2011	(r2134)
+++ cpu/arm/disassem.fth	Fri Jan 21 01:12:35 2011	(r2135)
@@ -245,10 +245,16 @@
    d#24 bit? 0=  5 2 bits 0=  and  if  .alu-ext  else  .ld/st-ext  then
 ;
 
+: .movw  ( -- )     \ movw rN,#imm
+   ." movw" {<cond>}  op.rd,  ." #" 
+   d# 16 4bits d# 12 <<  0 d# 12 bits  or u.h
+;
+
 \ Stop after changing PC
 : ?pc-change  ( -- )  d# 12 4bits d# 15 =  end-found !  ;
 
 : .alu-op  ( -- )	\ d# 25 3 bits 0|1 =
+   d#20 8bits  h# 30 =  if  .movw  exit  then
    d#25 bit? 0=  d# 4 bit? and  d# 7 bit? and  if  .ext  exit  then
    alu#  h# d and h# d =  if			\ Moves
       .alu {s}  op.rd, .r/imm