[openfirmware] r870 - cpu/x86/pc cpu/x86/pc/neptune cpu/x86/pc/neptune/build dev dev/dnet
svn at openfirmware.info
svn at openfirmware.info
Wed Aug 6 09:06:31 CEST 2008
Author: wmb
Date: 2008-08-06 09:06:30 +0200 (Wed, 06 Aug 2008)
New Revision: 870
Added:
cpu/x86/pc/neptune/
cpu/x86/pc/neptune/addrs.fth
cpu/x86/pc/neptune/banner.fth
cpu/x86/pc/neptune/build/
cpu/x86/pc/neptune/build/Makefile
cpu/x86/pc/neptune/build/old/
cpu/x86/pc/neptune/chipinit.fth
cpu/x86/pc/neptune/config.fth
cpu/x86/pc/neptune/devices.fth
cpu/x86/pc/neptune/fw.bth
cpu/x86/pc/neptune/gpioinit.fth
cpu/x86/pc/neptune/lpcflash.fth
cpu/x86/pc/neptune/msrinit.fth
cpu/x86/pc/neptune/msrscan.fth
cpu/x86/pc/neptune/neptune.bth
cpu/x86/pc/neptune/pcinode.fth
cpu/x86/pc/neptune/probemem.fth
cpu/x86/pc/neptune/rmstart.bth
cpu/x86/pc/neptune/rmstart.fth
cpu/x86/pc/neptune/romreset.bth
cpu/x86/pc/neptune/versions.fth
cpu/x86/pc/neptune/vsapci.fth
dev/dnet/
dev/dnet/build/
dev/dnet/dnet.bth
dev/dnet/dnet.fth
Log:
DAVE Neptune - initial commit of Neptune-specific files.
Added: cpu/x86/pc/neptune/addrs.fth
===================================================================
--- cpu/x86/pc/neptune/addrs.fth (rev 0)
+++ cpu/x86/pc/neptune/addrs.fth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,129 @@
+\ See license at end of file
+purpose: Establish address and I/O configuration definitions
+
+[ifdef] use-meg0
+h# f0.0000 constant dropin-base
+h# 08.0000 constant dropin-size
+h# 0.4000 constant fw-pa
+h# f.c000 constant /fw-ram
+[then]
+
+[ifdef] rom-loaded
+h# fff8.0000 constant rom-pa \ Physical address of boot ROM
+h# 8.0000 constant /rom \ Size of boot ROM
+rom-pa constant dropin-base
+
+h# 8.0000 constant dropin-size
+
+dropin-base h# 20 + constant ResetBase \ Location of "reset" dropin in ROM
+
+h# 1c0.0000 constant fw-pa
+h# 20.0000 constant /fw-ram
+[then]
+
+[ifdef] linuxbios-loaded
+\ h# d8.0000 constant dropin-base
+h# fff2.0000 constant dropin-base \ Location of payload in FLASH
+\ h# fff8.0000 constant dropin-base \ Location of payload in FLASH
+dropin-base h# 80 + h# 20 + constant ResetBase \ Location of "reset" dropin in ROM
+h# 08.0000 constant dropin-size
+h# 1e0.0000 constant fw-pa
+h# 20.0000 constant /fw-ram
+h# fff0.0000 constant rom-pa
+h# 10.0000 constant /rom
+[then]
+
+[ifdef] old-bzimage-loaded
+\ h# d8.0000 constant dropin-base
+h# 10.0020 constant dropin-base \ RAM address where Linux normally loads
+h# 08.0000 constant dropin-size
+h# 20.0000 constant fw-pa
+h# 20.0000 constant /fw-ram
+[then]
+
+[ifdef] bzimage-loaded
+h# 1d8.0020 constant dropin-base \ RAM address where we want to end up
+h# 08.0000 constant dropin-size
+h# 1e0.0000 constant fw-pa
+h# 20.0000 constant /fw-ram
+[then]
+
+[ifdef] syslinux-loaded
+h# 10.1020 constant dropin-base
+h# 07.e0e0 constant dropin-size
+h# 20.0000 constant fw-pa
+h# 20.0000 constant /fw-ram
+[then]
+
+[ifdef] grub-loaded
+h# 1b8.0000 constant dropin-base
+h# 08.0000 constant dropin-size
+h# 1c0.0000 constant fw-pa
+h# 20.0000 constant /fw-ram
+[then]
+
+h# 80.0000 constant def-load-base \ Convenient for initrd
+
+\ The heap starts at RAMtop, which on this system is "fw-pa /fw-ram +"
+
+\ We leave some memory in the /memory available list above the heap
+\ for DMA allocation by the sound and USB driver. OFW's normal memory
+\ usage thus fits in one 4M page-directory mapping region.
+
+h# 18.0000 constant heap-size
+
+h# 300.0000 constant jffs2-dirent-base
+h# 500.0000 constant jffs2-inode-base
+h# 700.0000 constant dma-base
+h# 900.0000 constant dma-size
+
+h# f.0000 constant suspend-base \ In the DOS hole
+h# f.0008 constant resume-entry
+h# f.0800 constant resume-data
+
+\ If you change these, also change {g/l}xmsrs.fth and {g/l}xearly.fth
+h# fd00.0000 constant fw-map-base
+h# ffc0.0000 constant fw-map-limit
+
+h# fd00.0000 constant fb-pci-base
+h# fe00.0000 constant gp-pci-base
+h# fe00.4000 constant dc-pci-base
+h# fe00.8000 constant vp-pci-base
+h# fe00.c000 constant vip-pci-base
+h# fe01.0000 constant aes-pci-base
+h# fe01.a000 constant ohci-pci-base
+h# fe01.b000 constant ehci-pci-base
+h# fe02.0000 constant nand-pci-base
+h# fe02.4000 constant sd-pci-base
+h# fe02.8000 constant camera-pci-base
+h# fe02.c000 constant uoc-pci-base
+
+fload ${BP}/cpu/x86/pc/virtaddr.fth
+[ifndef] virtual-mode
+h# ff80.0000 to fw-virt-base \ Override the usual setting; we use an MSR to double-map some memory up high
+h# 40.0000 to fw-virt-size
+[then]
+
+\ LICENSE_BEGIN
+\ Copyright (c) 2006 FirmWorks
+\
+\ Permission is hereby granted, free of charge, to any person obtaining
+\ a copy of this software and associated documentation files (the
+\ "Software"), to deal in the Software without restriction, including
+\ without limitation the rights to use, copy, modify, merge, publish,
+\ distribute, sublicense, and/or sell copies of the Software, and to
+\ permit persons to whom the Software is furnished to do so, subject to
+\ the following conditions:
+\
+\ The above copyright notice and this permission notice shall be
+\ included in all copies or substantial portions of the Software.
+\
+\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+\
+\ LICENSE_END
Added: cpu/x86/pc/neptune/banner.fth
===================================================================
--- cpu/x86/pc/neptune/banner.fth (rev 0)
+++ cpu/x86/pc/neptune/banner.fth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,56 @@
+\ See license at end of file
+purpose: Banner customization for this system
+
+headerless
+
+: .rom ( -- )
+ ." OpenFirmware "
+ push-decimal
+ major-release (.) type ." ." minor-release (.) type sub-release type
+ pop-base
+[ifdef] bzimage-loaded
+ ." booted from disk - " .built
+[then]
+;
+
+: (xbanner-basics) ( -- )
+ ?spaces cpu-model type ." , " .memory
+ ?spaces .rom
+;
+' (xbanner-basics) to banner-basics
+
+' (banner-warnings) to banner-warnings
+
+: stop-auto? ( -- flag ) idprom-valid? 0= auto-boot? and ;
+
+defer gui-banner ' true to gui-banner
+: ?gui-banner ( -- )
+ stop-auto? if suppress-auto-boot then
+
+ gui-banner drop
+;
+
+headers
+\ LICENSE_BEGIN
+\ Copyright (c) 2006 FirmWorks
+\
+\ Permission is hereby granted, free of charge, to any person obtaining
+\ a copy of this software and associated documentation files (the
+\ "Software"), to deal in the Software without restriction, including
+\ without limitation the rights to use, copy, modify, merge, publish,
+\ distribute, sublicense, and/or sell copies of the Software, and to
+\ permit persons to whom the Software is furnished to do so, subject to
+\ the following conditions:
+\
+\ The above copyright notice and this permission notice shall be
+\ included in all copies or substantial portions of the Software.
+\
+\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+\
+\ LICENSE_END
Added: cpu/x86/pc/neptune/build/Makefile
===================================================================
--- cpu/x86/pc/neptune/build/Makefile (rev 0)
+++ cpu/x86/pc/neptune/build/Makefile 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,28 @@
+OS := $(shell uname)
+
+all: neptune.rom
+
+neptune.rom: FORCE build ../../../build/inflate.bin ../../../../../clients/memtest86/memtest
+ ./build $@
+
+../../../${OS}/forth:
+ @make -C ../../../${OS} forth
+
+../../../build/inflate.bin:
+ @make -C ../../../build inflate.bin
+
+../../../../../clients/memtest86/memtest:
+ @make -C ../../../../../clients/memtest86 memtest
+
+build: ../../../${OS}/forth
+ @ln -sf ../../../${OS}/forth build
+
+clean:
+ rm -f *.dic *.log headers *~ *.elf *.di *.img builton.fth build neptune.rom
+
+clean-all: clean
+ @make -C ../../../build clean
+ @make -C ../../../${OS} clean
+ @make -C ../../../../../clients/memtest86 clean
+
+.PHONY: FORCE clean all clean-all
Added: cpu/x86/pc/neptune/chipinit.fth
===================================================================
--- cpu/x86/pc/neptune/chipinit.fth (rev 0)
+++ cpu/x86/pc/neptune/chipinit.fth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,108 @@
+: irq-init
+ h# 20 h# 4d0 pc! \ IRQ5 (AC-97) level triggered
+ h# 0c h# 4d1 pc! \ IRQA (USB) and IRQB (GXFB) level triggered
+;
+
+: msr: ( -- )
+ push-hex
+ safe-parse-word $dnumber? 1 <> abort" MSR number must be single precision"
+ ,
+ safe-parse-word $dnumber? 2 <> abort" MSR value must be double precision"
+ , ,
+ pop-base
+;
+
+fload ${BP}/cpu/x86/pc/neptune/msrinit.fth
+
+: msr-init-range ( -- adr len )
+ msr-init /msr-init
+;
+: find-msr-entry ( msr# -- 'data )
+ msr-init-range bounds ?do ( msr# )
+ dup i l@ = if ( msr# )
+ drop i la1+ unloop exit
+ then ( msr# )
+ 3 /l* +loop ( msr# )
+ drop true abort" No MSR entry"
+;
+
+: init-msr ( adr -- ) dup la1+ 2@ rot @ wrmsr ;
+
+: set-msrs ( -- )
+ msr-init-range bounds ?do i init-msr d# 12 +loop
+;
+
+code msr-slam ( adr len -- )
+ bx pop
+ dx pop
+ dx bx add \ endaddr
+ bp push \ save
+ dx bp mov \ Use BP as pointer
+
+ begin
+ 0 [bp] cx mov \ msr#
+ 4 [bp] dx mov \ msr.hi
+ 8 [bp] ax mov \ msr.lo
+ h# 0f asm8, h# 30 asm8, \ wrmsr
+ d# 12 # bp add
+ bp bx cmp
+ = until
+
+ bp pop
+c;
+
+: map-v=p ( phys size -- )
+ 2dup 0 mmu-claim drop ( phys size )
+ over swap -1 mmu-map ( )
+;
+
+: video-map
+[ifdef] virtual-mode
+ \ Map GP+DC+VP all at once with a large size
+ gp-pci-base h# c000 map-v=p
+[then]
+
+ \ Unlock the display controller registers
+\ write_vg_32(DC_UNLOCK, DC_UNLOCK_VALUE);
+ h# 4758 dc-pci-base 0 + l!
+
+\ Set up the DV Address offset in the DC_DV_CTL register to the offset from frame
+\ buffer descriptor. First, get the frame buffer descriptor so we can set the
+\ DV Address Offset in the DV_CTL register. Because this is a pointer to real
+\ silicon memory, we don't need to do this whenever we change the framebuffer BAR,
+\ so it isn't included in the hw_fb_map_init routine.
+\ SYS_MBUS_DESCRIPTOR((unsigned short)(vga_config_addr+BAR0),(void *)&mVal);
+\ mVal.high &= DESC_OFFSET_MASK;
+\ mVal.high <<= 4;
+\ mVal.high += framebuffer_base; // Watch for overflow issues here...
+\ write_vg_32(DC_DV_CTL, mVal.high);
+
+ \ The base address of the frame buffer in physical memory
+ fb-offset h# 88 dc-pci-base + l! \ DV_CTL register, undocumented
+
+\ hw_fb_map_init(PCI_FB_BASE);
+\ Initialize the frame buffer base related stuff.
+
+ fb-pci-base h# 84 dc-pci-base + l! \ GLIU0 Memory offset
+ fb-pci-base h# 4c gp-pci-base + l! \ GP base
+ fb-pci-base h# 80.0000 + h# 460 vp-pci-base + l! \ Flat panel base (reserved on LX)
+
+ \ VGdata.hw_vga_base = h# fd7.c000
+ \ VGdata.hw_cursor_base = h# fd7.bc00
+ \ VGdata.hw_icon_base = h# fd7.bc00 - MAX_ICON;
+[ifdef] virtual-mode
+ gp-pci-base h# c000 mmu-unmap
+[then]
+;
+
+: acpi-init
+\ !!! 16-bit writes to these registers don't work - 5536 erratum
+ 0 h# 1840 pl! \ Disable power button during early startup
+;
+: setup
+ set-msrs
+\ fix-sirq
+ gpio-init
+ acpi-init
+ irq-init
+;
Added: cpu/x86/pc/neptune/config.fth
===================================================================
--- cpu/x86/pc/neptune/config.fth (rev 0)
+++ cpu/x86/pc/neptune/config.fth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,82 @@
+\ See license at end of file
+purpose: Establish configuration definitions
+
+create neptune
+
+\ create debug-reset
+\ create debug-startup
+
+\ --- The environment that "boots" us ---
+\ - Image Format - Example Media - previous stage bootloader
+
+\ - OBMD format - ROM - direct boot from ROM
+create rom-loaded
+
+\ - ELF format (no pheader) - ROM - LinuxBIOS direct
+\ create linuxbios-loaded
+
+\ - Linux kernel format - USB Key w/ FAT FS - LinuxBIOS w/ stripped Linux payload
+\ create bzimage-loaded
+
+\ - ELF format w/ Multiboot signature - various - GRUB
+\ create grub-loaded
+
+\ - (Syslinux) COM32 format - USB Key w/ FAT FS - Syslinux
+\ create syslinux-loaded
+
+
+create virtual-mode
+create addresses-assigned \ Define if base addresses are already assigned
+create serial-console \ Define to default to serial port for console
+create pc
+create linux-support
+create jffs2-support
+create use-elf
+
+\ create lx-pll-autoconfig \ enable pll autoconfiguration from bootstrap pin
+create use-memtest86
+
+\ create use-timestamp-counter \ Use CPU's timestamp counter for timing ...
+ \ ... this is worthwhile if your CPU has one.
+
+create resident-packages
+\ create use-watch-all
+create use-root-isa \ If defined, isa node is in the devtree root, not under /pci
+create no-floppy-node
+\ create no-com2-node
+create no-lpt-node
+create use-pci-isa
+create basic-isa
+create isa-dma-only
+\ create use-ega
+\ create save-msrs
+
+create use-null-nvram \ Don't store configuration variables
+\ create use-flash-nvram \ Store configuration variables in firmware FLASH
+
+fload ${BP}/cpu/x86/pc/neptune/addrs.fth
+
+\ LICENSE_BEGIN
+\ Copyright (c) 2006 FirmWorks
+\ Copyright (c) 2008 Dave Srl
+\
+\ Permission is hereby granted, free of charge, to any person obtaining
+\ a copy of this software and associated documentation files (the
+\ "Software"), to deal in the Software without restriction, including
+\ without limitation the rights to use, copy, modify, merge, publish,
+\ distribute, sublicense, and/or sell copies of the Software, and to
+\ permit persons to whom the Software is furnished to do so, subject to
+\ the following conditions:
+\
+\ The above copyright notice and this permission notice shall be
+\ included in all copies or substantial portions of the Software.
+\
+\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+\
+\ LICENSE_END
Added: cpu/x86/pc/neptune/devices.fth
===================================================================
--- cpu/x86/pc/neptune/devices.fth (rev 0)
+++ cpu/x86/pc/neptune/devices.fth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,333 @@
+\ See license at end of file
+purpose: Load device drivers according to configuration definitions
+
+: lx? true ;
+: gx? false ;
+
+fload ${BP}/dev/geode/msr.fth
+fload ${BP}/cpu/x86/pc/isaio.fth
+
+[ifdef] rom-loaded
+fload ${BP}/cpu/x86/pc/neptune/vsapci.fth \ PCI configuration access with some hacks
+[else]
+fload ${BP}/dev/pci/configm1.fth \ Generic PCI configuration access
+[then]
+
+0 0 " " " /" begin-package
+ fload ${BP}/cpu/x86/pc/mappci.fth \ Map PCI to root
+ fload ${BP}/dev/pcibus.fth \ Generic PCI bus package
+ fload ${BP}/cpu/x86/pc/neptune/pcinode.fth \ System-specific words for PCI
+end-package
+stand-init: PCI host bridge
+ " /pci" " init" execute-device-method drop
+;
+
+fload ${BP}/dev/pciprobe.fth \ Generic PCI probing
+
+\ Use the CPU chip's Time Stamp Counter for timing; it does just what we want
+fload ${BP}/cpu/x86/tsc.fth
+\ d# 366,666 to ms-factor \ XXX is this right????
+\ d# 367 to us-factor
+
+stand-init:
+ d# 366,666,667 " AMD,Geode LX"
+
+ " /cpu" find-device ( cpu-clock-hz model$ )
+ " model" string-property ( cpu-clock-hz )
+ dup " clock-frequency" integer-property ( cpu-clock-hz )
+ device-end ( cpu-clock-hz )
+
+ d# 1000 rounded-/ dup to ms-factor ( cpu-clock-khz )
+ d# 1000 rounded-/ to us-factor ( )
+;
+
+[ifdef] use-ega
+0 0 " " " /" begin-package
+ fload ${BP}/dev/egatext.fth
+end-package
+\ devalias screen /ega-text
+[then]
+
+[ifdef] use-root-isa
+0 0 " " " /" begin-package
+ fload ${BP}/cpu/x86/pc/isabus.fth \ ISA Bus Bridge under root node
+end-package
+[then]
+
+[ifdef] use-pci-isa
+ [ifdef] addresses-assigned
+ [ifdef] use-pci-isa
+ \ This must precede isamisc.fth in the load file, to execute it first
+ fload ${BP}/cpu/x86/pc/moveisa.fth
+ [then]
+ [then]
+
+0 0 " 0" " /pci" begin-package
+ fload ${BP}/dev/pci/isa.fth \ ISA bus bridge under PCI node
+ fload ${BP}/dev/pci/isamisc.fth
+end-package
+
+[then]
+
+fload ${BP}/cpu/x86/pc/olpc/timertest.fth \ Selftest for PIT timer
+
+1 [if]
+warning @ warning off
+: probe-pci ( -- )
+ probe-pci
+ " /pci" " make-interrupt-map" execute-device-method drop
+;
+warning !
+
+\ Create the top-level device node to access the entire boot FLASH device
+\ 0 0 " fff00000" " /" begin-package
+0 0 dropin-base <# u#s u#> " /" begin-package
+ " flash" device-name
+
+ h# 10.0000 value /device
+ h# 10.0000 constant /device-phys
+ my-address my-space /device-phys reg
+ fload ${BP}/dev/flashpkg.fth
+ fload ${BP}/dev/flashwrite.fth
+end-package
+
+\ Create a node below the top-level FLASH node to accessing the portion
+\ containing the dropin modules
+0 0 " 10000" " /flash" begin-package
+ " dropins" device-name
+
+ h# c0000 constant /device
+ fload ${BP}/dev/subrange.fth
+end-package
+
+devalias dropins /dropins
+
+\ Create a pseudo-device that presents the dropin modules as a filesystem.
+fload ${BP}/ofw/fs/dropinfs.fth
+
+\ This devalias lets us say, for example, "dir rom:"
+devalias rom /dropin-fs
+
+fload ${BP}/cpu/x86/forthint.fth \ Low-level interrupt handling code
+fload ${BP}/dev/isa/irq.fth \ ISA interrupt dispatcher
+fload ${BP}/cpu/x86/pc/isatick.fth \ Use ISA timer as the alarm tick timer
+
+dev /interrupt-controller
+irq-vector-base to vector-base0
+vector-base0 8 + to vector-base1
+device-end
+
+[ifdef] resident-packages
+support-package: 16550
+fload ${BP}/dev/16550pkg/16550.fth \ Serial port support package
+end-support-package
+[then]
+
+fload ${BP}/dev/pci/isaall.fth
+devalias com1 /isa/serial at i3f8:115200
+\ devalias mouse /isa/8042/mouse
+devalias d disk
+devalias n nand
+devalias u /usb/disk
+devalias sd /sd/disk
+
+\ If we don't do the ctlr-selftest, the keyboard won't start on the LX devel board
+\ dev /8042 patch false ctlr-selftest open device-end
+
+0 0 " i70" " /isa" begin-package \ Real-time clock node
+ fload ${BP}/dev/ds1385r.fth
+ 8 encode-int 0 encode-int encode+ " interrupts" property
+ 2 encode-int " device#" property
+end-package
+0 [if] \ XXX check me
+stand-init: RTC
+ " /rtc" open-dev clock-node !
+;
+[then]
+
+fload ${BP}/cpu/x86/pc/cpunode.fth
+fload ${BP}/cpu/x86/k6cputest.fth \ Burnin test for K6 CPU
+
+0 [if]
+fload ${BP}/ofw/console/bailout.fth
+stand-init: Keyboard overrides
+ ?bailout
+;
+[then]
+
+fload ${BP}/forth/lib/pattern.fth \ Text string pattern matching
+fload ${BP}/forth/lib/tofile.fth \ to-file and append-to-file
+\ XXX remove the OS file commands from tools.dic
+fload ${BP}/ofw/core/filecmds.fth \ File commands: dir, del, ren, etc.
+
+fload ${BP}/cpu/x86/pc/olpc/cmos.fth \ CMOS RAM indices are 1f..ff , above RTC
+
+devalias nand /nandflash
+devalias mtd /nandflash
+
+[ifdef] use-null-nvram
+\ For not storing configuration variable changes across reboots ...
+\ This is useful for "turnkey" systems where configurability would
+\ increase support costs.
+
+fload ${BP}/cpu/x86/pc/nullnv.fth
+stand-init: Null-NVRAM
+ " /null-nvram" open-dev to nvram-node
+ ['] init-config-vars catch drop
+;
+[then]
+
+[ifdef] use-flash-nvram
+\ For configuration variables stored in a sector of the boot FLASH ...
+
+\ Create a node below the top-level FLASH node to access the portion
+\ containing the configuration variables.
+0 0 " d0000" " /flash" begin-package
+ " nvram" device-name
+
+ h# 10000 constant /device
+ fload ${BP}/dev/subrange.fth
+end-package
+
+stand-init: NVRAM
+ " /nvram" open-dev to nvram-node
+ ['] init-config-vars catch drop
+;
+[then]
+
+\ Create the alias unless it already exists
+: $?devalias ( alias$ value$ -- )
+ 2over not-alias? if $devalias exit then ( alias$ value$ alias$ )
+ 2drop 4drop
+;
+
+: report-disk ( -- )
+ " /usb/disk" locate-device 0= if
+ drop
+ " disk" " /usb/disk" $devalias
+ exit
+ then
+ " /usb at f,4/disk" locate-device 0= if
+ ." Found USB 1.1 disk!" cr
+ drop
+ " disk" " /usb at f,4/disk" $devalias
+ exit
+ then
+;
+
+: report-keyboard ( -- )
+ " /usb at f,4/keyboard" locate-device 0= if
+ drop
+ " keyboard" " /usb at f,4/keyboard" $devalias
+ exit
+ then
+
+ \ In case the keyboard is behind a USB 2 hub
+ " /usb at f,5/keyboard" locate-device 0= if
+ drop
+ " keyboard" " /usb at f,5/keyboard" $devalias
+ then
+;
+
+fload ${BP}/cpu/x86/inoutstr.fth \ Multiple I/O port read/write
+fload ${BP}/dev/isa/diaguart.fth \ ISA COM port driver
+\ : inituarts ascii G uemit ascii o uemit ; \ They are already on
+
+h# 3f8 is uart-base
+fload ${BP}/forth/lib/sysuart.fth \ Use UART for key and emit
+
+[ifndef] save-flash
+: save-flash ;
+: restore-flash ;
+[then]
+
+\needs md5init fload ${BP}/ofw/ppp/md5.fth \ MD5 hash
+
+fload ${BP}/dev/geode/acpi.fth \ Power management
+\ warning @ warning off
+\ : stand-init-io stand-init-io h# fff0.0000 to flash-base ;
+\ warning !
+: cpu-mhz ( -- n )
+ " /cpu at 0" find-package drop ( phandle )
+ " clock-frequency" rot get-package-property if 0 exit then ( adr )
+ decode-int nip nip d# 1000000 /
+;
+
+stand-init: PCI properties
+ " /pci" find-device
+ d# 66,666,667 " clock-frequency" integer-property
+ dend
+;
+
+fload ${BP}/cpu/x86/pc/neptune/lpcflash.fth
+
+fload ${BP}/dev/geode/lpcflash.fth \ Reflasher for PLCC FLASH on A-test
+
+: +i encode-int encode+ ; : 0+i 0 +i ;
+
+[ifdef] rom-loaded
+fload ${BP}/cpu/x86/pc/neptune/gpioinit.fth
+fload ${BP}/cpu/x86/pc/neptune/chipinit.fth
+[then]
+
+false config-int tft-mode?
+
+fload ${BP}/cpu/x86/fb16-ops.fth
+fload ${BP}/ofw/termemu/fb16.fth
+0 0 " 1,1" " /pci" begin-package
+ fload ${BP}/dev/geode/display/loadpkg.fth \ Geode display
+
+ 0 0 encode-bytes
+ h# 8200.0910 +i 0+i fb-pci-base +i 0+i h# 0080.0000 +i \ Frame buffer
+ h# 8200.0914 +i 0+i gp-pci-base +i 0+i h# 0000.4000 +i \ GP
+ h# 8200.0918 +i 0+i dc-pci-base +i 0+i h# 0000.4000 +i \ DC
+ h# 8200.091c +i 0+i vp-pci-base +i 0+i h# 0000.4000 +i \ VP
+ h# 8200.0920 +i 0+i vip-pci-base +i 0+i h# 0000.4000 +i \ VIP (LX only)
+ " assigned-addresses" property
+
+end-package
+devalias screen /display
+also hidden d# 34 to display-height previous \ For editing
+
+fload ${BP}/cpu/x86/adpcm.fth \ ADPCM decoding
+
+warning @ warning off
+: stand-init
+ stand-init
+ root-device
+\ XXX perhaps report subordinate version info?
+ " Neptune" model
+ " Neptune" " banner-name" string-property
+ dend
+
+ " /openprom" find-device
+ h# ffff.ffc0 d# 16 " model" string-property
+
+ " sourceurl" find-drop-in if " source-url" string-property then
+ dend
+;
+warning !
+
+\ LICENSE_BEGIN
+\ Copyright (c) 2006 FirmWorks
+\
+\ Permission is hereby granted, free of charge, to any person obtaining
+\ a copy of this software and associated documentation files (the
+\ "Software"), to deal in the Software without restriction, including
+\ without limitation the rights to use, copy, modify, merge, publish,
+\ distribute, sublicense, and/or sell copies of the Software, and to
+\ permit persons to whom the Software is furnished to do so, subject to
+\ the following conditions:
+\
+\ The above copyright notice and this permission notice shall be
+\ included in all copies or substantial portions of the Software.
+\
+\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+\
+\ LICENSE_END
Added: cpu/x86/pc/neptune/fw.bth
===================================================================
--- cpu/x86/pc/neptune/fw.bth (rev 0)
+++ cpu/x86/pc/neptune/fw.bth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,529 @@
+purpose: Build Open Firmware for Dave Neptune board
+\ See license at end of file
+
+dictionary: ${BP}/cpu/x86/build/basefw.dic
+command: &x86forth &dictionary &this
+in: builton.fth
+build-now
+
+
+hex
+\ ' $report-name is include-hook
+
+fload ${BP}/cpu/x86/pc/neptune/config.fth
+
+: headerless ; : headers ; : headerless0 ;
+
+' (quit) to quit
+
+create debug-startup
+: \Tags [compile] \ ; immediate
+: \NotTags [compile] \ ; immediate
+
+: RAMbase ( -- adr ) fw-virt-base ;
+: RAMtop ( -- adr ) RAMbase /fw-ram + ;
+
+h# 00.0000 value dp-loc \ Set in patchboot
+: stacktop ( -- adr ) RAMtop ;
+: dict-limit ( -- adr ) RAMtop h# 06.0000 - ;
+
+\ XXX What we should do is pass in the top address in SP, and have
+\ boot.fth allocate the user area by subtracting user-size. But
+\ we need some way of finding it again for exception re-entry.
+\ prom-main-task is used in arch/pc/boot.fth . The constant
+\ value is wired into the assembly code
+stacktop user-size - constant prom-main-task \ user area for main task
+
+0 value load-limit \ Top address of area at load-base
+' 2drop to sync-cache
+
+def-load-base ' load-base set-config-int-default
+
+true ' fcode-debug? set-config-int-default
+true ' auto-boot? set-config-int-default
+
+[ifdef] serial-console
+" com1" ' output-device set-config-string-default
+" com1" ' input-device set-config-string-default
+[then]
+
+\ XXX should be loaded by basefw.bth
+fload ${BP}/cpu/x86/initpgm.fth \ Basic boot handler
+fload ${BP}/cpu/x86/msr.fth \ Access to machine specific registers
+
+: (cpu-arch ( -- adr len )
+ " architecture" ['] root-node get-package-property drop
+ get-encoded-string
+;
+' (cpu-arch to cpu-arch
+
+h# 1000 to pagesize
+d# 12 to pageshift
+
+dev /
+1 encode-int " #address-cells" property
+1 encode-int " #size-cells" property
+" Neptune" encode-string " architecture" property
+device-end
+
+\ Memory management services
+[ifdef] virtual-mode
+fload ${BP}/ofw/core/clntmem1.fth \ client services for memory
+[else]
+fload ${BP}/ofw/core/clntphy1.fth \ client services for memory
+: >physical ( va -- pa )
+ dup fw-virt-base - fw-virt-size u< if ( va )
+ fw-virt-base - fw-pa +
+ then
+;
+[then]
+fload ${BP}/ofw/core/memlist.fth \ Resource list common routines
+fload ${BP}/ofw/core/showlist.fth \ Linked list display tool
+fload ${BP}/ofw/core/allocph1.fth \ S Physical memory allocator
+fload ${BP}/ofw/core/availpm.fth \ Available memory list
+
+fload ${BP}/cpu/x86/pc/rootnode.fth \ Platform-specific root node changes
+dev /
+alias lmove lmove \ Needed by CS5536 NAND FLASH driver
+dend
+
+fload ${BP}/dev/geode/gpio.fth \ Rudimentary GPIO driver
+fload ${BP}/cpu/x86/pc/neptune/probemem.fth \ Memory probing
+
+[ifdef] virtual-mode
+fload ${BP}/cpu/x86/loadvmem.fth \ /mmu node
+
+stand-init: MMU
+ " /mmu" open-dev mmu-node !
+;
+fload ${BP}/cpu/x86/pc/initdict.fth \ Dynamic dictionary allocation
+[then]
+
+\ XXX should be elsewhere
+dev /client-services
+: chain ( len args entry size virt -- )
+ release ( len args entry )
+ h# 8000 alloc-mem h# 8000 + (init-program) ( len args )
+ to %ebx to %ecx
+ go
+;
+device-end
+
+fload ${BP}/cpu/x86/crc32.fth \ Assembly language Zip CRC calculation
+fload ${BP}/forth/lib/crc32.fth \ High-level portion of CRC calculation
+
+[ifdef] resident-packages
+
+[ifdef] use-ufs
+support-package: ufs-file-system
+ fload ${BP}/ofw/fs/ufs/ufs.fth \ Unix file system
+end-support-package
+[then]
+
+[ifdef] linux-support
+\needs unix-seconds> fload ${BP}/ofw/fs/unixtime.fth \ Unix time calculation
+support-package: ext2-file-system
+ fload ${BP}/ofw/fs/ext2fs/ext2fs.fth \ Linux file system
+end-support-package
+[then]
+
+[ifdef] jffs2-support
+\needs unix-seconds> fload ${BP}/ofw/fs/unixtime.fth \ Unix time calculation
+support-package: jffs2-file-system
+ fload ${BP}/ofw/fs/jffs2/jffs2.fth \ Journaling flash file system 2
+end-support-package
+[then]
+
+support-package: zip-file-system
+ fload ${BP}/ofw/fs/zipfs.fth \ Zip file system
+end-support-package
+
+support-package: dropin-file-system
+ fload ${BP}/ofw/fs/dropinfs.fth \ Dropin file system
+end-support-package
+[then]
+
+support-package: minix-file-system
+ fload ${BP}/ofw/fs/minix.fth \ Minix3 file system
+end-support-package
+
+fload ${BP}/ofw/core/osfile.fth \ For testing
+
+\ Load file format handlers
+
+: call32 ;
+
+fload ${BP}/ofw/core/allocsym.fth \ Allocate memory for symbol table
+fload ${BP}/ofw/core/symcif.fth
+fload ${BP}/ofw/core/symdebug.fth
+: release-load-area ( boundary-adr -- ) drop ;
+
+fload ${BP}/cpu/x86/pc/fixkbd.fth \ Switch keyboard scan codes
+
+[ifdef] use-elf
+fload ${BP}/ofw/elf/elf.fth
+fload ${BP}/ofw/elf/elfdebug.fth
+[ifdef] virtual-mode
+: (elf-map-in) ( va size -- ) swap 1 -rot allocate-aligned drop ;
+\ Depends on the assumption that physical memory is mapped 1:1 already
+\ : (elf-map-in) ( va size -- ) 0 mem-claim drop ;
+' (elf-map-in) is elf-map-in
+[else]
+: (elf-map-in) ( va size -- ) 2drop ;
+[then]
+' (elf-map-in) is elf-map-in
+[then]
+
+\ Reboot and re-entry code
+fload ${BP}/cpu/x86/pc/reboot.fth \ Restart the client program
+fload ${BP}/cpu/x86/pc/reenter.fth \ Various entries into Forth
+
+headerless
+[ifdef] virtual-mode
+: (initial-heap) ( -- adr len ) sp0 @ ps-size - dict-limit tuck - ;
+[else]
+: (initial-heap) ( -- adr len ) RAMtop heap-size ;
+[then]
+' (initial-heap) is initial-heap
+headers
+
+" /openprom" find-device
+ " FirmWorks,3.0" encode-string " model" property
+device-end
+
+[ifdef] virtual-mode
+fload ${BP}/cpu/x86/pc/mmusetup.fth \ Initial values for MMU lists
+\ XXX check me
+\ dev /mmu
+\ : claim-rom ( -- )
+\ (initial-claim)
+\ rom-pa h# ffff.0000 over - claim-virtual drop \ ROM 1-1 map
+\ ;
+\ ' claim-rom to initial-claim
+\ dend
+[then]
+
+: background-rgb ( -- r g b ) h# ff h# ff h# ff ;
+
+fload ${BP}/cpu/x86/pc/neptune/devices.fth
+
+fload ${BP}/ofw/core/countdwn.fth \ Startup countdown
+patch 3 6 get-countdown
+
+fload ${BP}/dev/scsi/probscsi.fth \ probe-scsi and probe-scsi-all
+
+true ' local-mac-address? set-config-int-default
+[ifdef] resident-packages
+support-package: nfs
+ fload ${BP}/ofw/fs/nfs/loadpkg.fth
+end-support-package
+
+[then]
+devalias nfs net//obp-tftp:last//nfs
+
+fload ${BP}/cpu/x86/pc/boot.fth
+
+h# 3ea constant usb-port-power-map \ USB4:PWR2 USB3:PWR1 USB2:PWR1 USB1:PWR1
+fload ${BP}/dev/geode/usb.fth
+\ ' noop to go-hook \ this is required for accessing USB device from client program (e.g. VME)
+
+\ false to stand-init-debug?
+true to stand-init-debug?
+
+hex
+: i-key-wait ( ms -- pressed? )
+ cr ." Type 'i' to interrupt stand-init sequence" cr
+ 0 do
+ key? if
+ key upc ascii I = if true unloop exit then
+ then
+ 1 ms
+ loop
+ false
+;
+
+\ stand-init-debug? [if]
+warning @ warning off
+: init
+\ initial-heap add-memory
+ init
+
+ standalone? if
+ disable-interrupts
+[ifdef] rom-loaded
+ d# 300
+ h# 1454 pl@ 2 and if
+ ." Interacting due to botched resume" cr hex interact
+ then
+ i-key-wait if ." Interacting" cr hex interact then
+ setup
+[else]
+ d# 3000
+ i-key-wait if ." Interacting" cr hex interact then
+[then]
+ then
+;
+\ warning !
+[then]
+
+: (.firmware) ( -- )
+ ." Open Firmware " .built cr
+ ." Copyright 1999 FirmWorks All Rights Reserved" cr
+;
+' (.firmware) to .firmware
+
+: probe-all ( -- )
+ probe-pci
+ probe-usb
+;
+
+fload ${BP}/ofw/gui/bmptools.fth
+fload ${BP}/dev/null.fth
+fload ${BP}/ofw/core/bailout.fth
+
+fload ${BP}/cpu/x86/pc/neptune/banner.fth
+
+fload ${BP}/ofw/gui/loadmenu.fth
+\ fload ${BP}/ofw/gui/insticon.fth
+
+fload ${BP}/cpu/x86/pc/linux.fth
+
+\ Use values like these if you want to boot directly instead of through an intermediate script
+ " u:\boot\bzImage" ' boot-device set-config-string-default
+\ " console=uart,io,0x3f8,115200" ' boot-file set-config-string-default
+ \ " console=uart,io,0x3f8,115200 root=/dev/nfs rw nfsroot=192.168.42.100:/usr/local/rfs_x86,proto=tcp,hard ip=192.168.42.99:192.168.42.100::255.255.255.0:neptune:eth0:off init=/bin/sh" ' boot-file set-config-string-default
+ " console=uart,io,0x3f8,115200 console=tty0 root=/dev/nfs rw nfsroot=192.168.0.23:/home/shared/devel/neptune/sw/rfs/x86_32_rfs,proto=tcp,hard ip=192.168.0.77:192.168.0.23::255.255.255.0:neptune:eth0:off video=1027x768M at 60m init=/bin/bash" ' boot-file set-config-string-default
+\ \needs ramdisk " u:\boot\initrd.img" d# 128 config-string ramdisk
+\needs ramdisk " " d# 128 config-string ramdisk
+\ " " ' boot-file set-config-string-default \ Let the boot script set the cmdline
+
+\ " disk:\boot\boot.fth nand:\boot\boot.fth /prober /usb/ethernet" ' boot-device set-config-string-default
+
+[ifdef] use-memtest86
+: memtest ( -- ) " rom:memtest" $boot ;
+\ fload ${BP}/cpu/x86/pc/olpc/memtest.fth
+[then]
+
+\ Eliminate 4 second delay in install console for the case where
+\ there is no keyboard. The delay is unnecessary because the screen
+\ does not go blank when the device is closed.
+patch drop ms install-console
+
+: cs5536-reset-all ( -- )
+[ifdef] rom-loaded
+ 1. h# 5140.0017 wrmsr \ DIVIL_SOFT_RESET MSR, 5536 page 367
+ begin again
+[else]
+ (reset-all)
+[then]
+;
+' cs5536-reset-all to reset-all
+
+alias reboot bye
+
+[ifdef] use-watch-all
+fload ${BP}/cpu/x86/pc/watchall.fth
+[then]
+
+alias crcgen drop ( crc byte -- crc' )
+fload ${BP}/cpu/x86/pc/saveabs.fth
+
+fload ${BP}/forth/lib/selstr.fth
+
+fload ${BP}/ofw/inet/loadtcp.fth
+
+support-package: http
+ fload ${BP}/ofw/inet/http.fth \ HTTP client
+end-support-package
+
+fload ${BP}/ofw/wifi/wifi-cfg.fth
+support-package: supplicant
+fload ${BP}/ofw/wifi/loadpkg.fth
+end-support-package
+
+[ifdef] use-ppp
+fload ${BP}/ofw/ppp/loadppp.fth
+[then]
+
+" dhcp" ' ip-address set-config-string-default
+
+\ fload ${BP}/cpu/x86/pc/report.fth
+fload ${BP}/ofw/core/dualconsole.fth
+
+true constant user-switch? ( -- flag )
+: fast-boot? ( -- flag )
+[ifdef] rom-loaded
+false exit
+ user-switch? 0=
+[else]
+ false
+[then]
+;
+
+: interpreter-init ( -- )
+ hex
+ warning on
+ only forth also definitions
+
+ install-alarm
+
+ page-mode
+ #line off
+
+\ .built cr
+;
+
+: console-start ( -- )
+[ifdef] rom-loaded
+ video-map cr
+[then]
+ " screen" open-dev ?dup if
+ set-stdout
+\ logo-banner drop
+\ close-dev
+\ 0 stdout !
+ then
+
+ install-dual-console
+
+ ?gui-banner
+ " probe-" do-drop-in
+\ ." nvramrc" cr
+\ use-nvramrc? if nvramrc safe-evaluate then
+;
+: debug-interact ( -- )
+ early-interact? if
+ " Interrupting startup sequence prior to probing" .because
+ ." Type 'resume' to resume normal startup sequence." cr
+ \ fallback-device io console-io
+ ( help-msg ) interact
+ then
+;
+
+: geode-print-pll ( -- )
+ ." Geode CPU Speed "
+ h# 4c00.0014 rdmsr swap drop
+ h# 3E and 2/
+ 1 + d# 66 * 2/ decimal . cr
+
+ ." GeodeLink Speed "
+ h# 4c00.0014 rdmsr swap drop
+ h# FFF and 7 >>
+ 1 + d# 66 * 2/ decimal . cr
+
+ ." PCI Speed "
+ h# 4c00.0014 rdmsr drop
+ 1 7 << and
+ 0= if d# 33 . else d# 66 . then cr
+
+ hex
+
+;
+
+h# ffac0000 constant lpc-flash2-phys
+h# 40000 constant /lpc-flash2 \ size
+
+: neptune-flash2-map
+
+ lpc-flash2-phys /lpc-flash2 0 mmu-claim drop \ Reserve the virtual address range
+ lpc-flash2-phys dup /lpc-flash2 -1 mmu-map \ Create a mapping
+;
+
+: vme ( -- )
+ ." Running Lattice programmer "
+ com1 io
+ verbose-cif
+ " u:\neptune.vme" to boot-file
+ " u:\vme.elf" $boot
+;
+
+fload ${BP}/cpu/x86/pc/neptune/versions.fth
+
+: optional-startup ( -- )
+ probe-usb
+ ?usb-keyboard
+;
+
+: startup ( -- )
+ standalone? 0= if exit then
+
+\ ?bailout
+
+ no-page
+
+ console-start
+ ." Welcome to Dave Neptune (OFW 0.9.3)" cr
+ geode-print-pll
+
+ fast-boot? if
+ probe-pci
+ ['] false to interrupt-auto-boot?
+ interpreter-init
+ auto-boot
+ optional-startup
+ else
+ ." Interactive boot" cr
+
+ ." PCI Probe" cr
+ probe-pci
+ ." USB probe" cr
+ optional-startup
+ interpreter-init
+ auto-boot
+ then
+
+ blue-letters ." Type 'help' for more information." black-letters
+ cr cr
+
+ quit
+;
+
+\ This helps with TeraTerm, which sends ESC-O as the arrow key prefix
+also hidden also keys-forth definitions
+warning @ warning off
+: esc-o key lastchar ! [""] esc-[ do-command ;
+warning !
+previous previous definitions
+
+.( --- Saving fw.dic ...)
+" fw.dic" $save-forth cr
+
+\ patch foo decimal cold
+
+[ifndef] notdef
+.( --- Saving fw.img ...)
+" fw.img" RAMbase save-abs-rom cr
+[then]
+
+[ifdef] notdef-com32
+.( Saving fw.c32 ...)
+fw-pa h# 10.1000 <> [if]
+.( fw-pa must be 10.1000 for COM32 load format) cr
+[else]
+" fw.c32" RAMbase save-abs-rom cr
+[then]
+[then]
+
+\ LICENSE_BEGIN
+\ Copyright (c) 2006 FirmWorks
+\
+\ Permission is hereby granted, free of charge, to any person obtaining
+\ a copy of this software and associated documentation files (the
+\ "Software"), to deal in the Software without restriction, including
+\ without limitation the rights to use, copy, modify, merge, publish,
+\ distribute, sublicense, and/or sell copies of the Software, and to
+\ permit persons to whom the Software is furnished to do so, subject to
+\ the following conditions:
+\
+\ The above copyright notice and this permission notice shall be
+\ included in all copies or substantial portions of the Software.
+\
+\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+\
+\ LICENSE_END
Added: cpu/x86/pc/neptune/gpioinit.fth
===================================================================
--- cpu/x86/pc/neptune/gpioinit.fth (rev 0)
+++ cpu/x86/pc/neptune/gpioinit.fth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,55 @@
+purpose: GPIO settings for DAVE Neptune
+
+0 [if] \ This_Is_Documentation
+ 0 I ~ INTA#
+ 1 O1 PCBEEP out AUX
+ 2 I1 IDEIRQ14 in
+ 3 O CRT_SCL
+ 4 O I CRT_SDA
+ 5 I IDE_CABLEID in
+ 6 I GPIO6 out page 26 check (also out from X4 connector pin 42) output from battery monitor header
+ 7 I ~ INTB# in 10,2025
+ 8 O 2 O2 IRTX out
+ 9 I1 IRRX in
+10 I1 THRM_ALRM# in
+11 O1 SLP_CLK# out would be O1 for SLP_CLK_EN#
+12 I ~ INTC# 10,25
+13 I ~ INTD#_SLPBUT 25 (I1 for SLPBUT) ??
+14 O1 I1 SMB_SCL
+15 O1 I1 SMB_SDA
+
+16-20 LPC 21 LPC_SERIRQ 22 LPC_LFRAME
+
+24 O1 WORK_AUX out
+25 I1 LOW_BAT# in
+26 I PME# in 18,20,25
+27 O1 MFGPT7_C1 out 26
+28 I1 pwrbut# in
+OutEn - 0900 c91a
+OutA1 - 0900 c802
+OutA2 - 0000 0100
+InEn - 1600 f6f5
+InA1 - 1200 c604
+InInv - 0000 3081
+[then]
+: gpio-init ( -- )
+ h# 0000 h# 1090 pl! h# c802 h# 1010 pl! \ Output AUX1
+ h# 0000 h# 1094 pl! h# 100 h# 1014 pl! \ Output AUX2
+ h# 0900 h# 1084 pl! h# c91a h# 1004 pl! \ Output Enable
+ h# 1600 h# 10a0 pl! h# f6f5 h# 1020 pl! \ Input Enable
+ h# 1200 h# 10b4 pl! h# c604 h# 1034 pl! \ Input AUX1
+
+ h# 0000 h# 10a4 pl! h# 3081 h# 1024 pl! \ Input Invert (Int lines)
+ h# 0000 h# 10b8 pl! h# 3081 h# 1038 pl! \ Event enable (Int lines)
+
+ h# 1000.0000 h# 1098 pl! \ No pullup on pwrbut_in
+ h# 1000 h# 10a8 pl! \ filter pwrbut_in
+
+ h# 1000.0000 h# 101c pl! \ No pulldown on INTC#
+ h# 3081.cf7e h# 1018 pl! \ No pullups on INTA..D
+
+ \ h# 0800 h# 1088 pl! \ MFGPT7_C1 is open drain
+
+ \ teo was here
+ h# 00000005 h# 10e0 pl! \ GPIO 0(CaFe) -> group 5
+;
Added: cpu/x86/pc/neptune/lpcflash.fth
===================================================================
--- cpu/x86/pc/neptune/lpcflash.fth (rev 0)
+++ cpu/x86/pc/neptune/lpcflash.fth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,37 @@
+\ See license at end of file
+\ User interface for reflashing SPI FLASH parts
+
+\ This code is concerned with the user interface for getting
+\ a new firmware image into memory and using it to program
+\ a FLASH device from that image. The details of how to actually
+\ access the FLASH device are defined elsewhere.
+
+h# 100000 to /flash
+\ h# 800000 constant flash-buf
+\ h# 10000 constant /flash-block \ Size of erase block
+
+\ 0 value file-loaded?
+
+\ LICENSE_BEGIN
+\ Copyright (c) 2008 Dave Srl
+\
+\ Permission is hereby granted, free of charge, to any person obtaining
+\ a copy of this software and associated documentation files (the
+\ "Software"), to deal in the Software without restriction, including
+\ without limitation the rights to use, copy, modify, merge, publish,
+\ distribute, sublicense, and/or sell copies of the Software, and to
+\ permit persons to whom the Software is furnished to do so, subject to
+\ the following conditions:
+\
+\ The above copyright notice and this permission notice shall be
+\ included in all copies or substantial portions of the Software.
+\
+\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+\
+\ LICENSE_END
Added: cpu/x86/pc/neptune/msrinit.fth
===================================================================
--- cpu/x86/pc/neptune/msrinit.fth (rev 0)
+++ cpu/x86/pc/neptune/msrinit.fth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,248 @@
+purpose: MSR settings for DAVE Neptune
+
+create msr-init
+\ Memsize-dependent MSRs are set in the early startup code
+
+\ CPU
+ msr: 0000.1100 00000100.00005051. \ Branch tree messaging sync
+ msr: 0000.1210 00000000.00000003. \ Suspend on halt and pause
+ msr: 0000.1900 00000000.02001131. \ Pausedly 16 clocks, SUSP + TSC_SUSP
+ msr: 0000.1920 00000000.0000000f. \ Enable L2 cache
+ msr: 0000.1a00 00000000.00000001. \ GX p 178 Imprecise exceptions
+
+\ northbridgeinit: GLIUS
+\ msr: 1000.0020 20000000.000fff80. \ 0 - 7.ffff low RAM Early startup
+\ msr: 1000.0024 000000ff.fff00000. \ Unmapped - default
+ msr: 1000.0022 a00000fe.000ffffc. \ fe00.0000 - fe00.3fff GP
+ msr: 1000.0023 400000fe.008ffff8. \ fe00.8000 - fe00.bfff VP + VIP in GLIU1
+ msr: 1000.0024 400000fe.010ffffc. \ fe01.0000 - fe01.3fff security block in GLIU1
+\ msr: 1000.0025 000000ff.fff00000. \ Unmapped - default
+\ msr: 1000.0026 000000ff.fff00000. \ Unmapped - default
+
+\ Graphics
+\ msr: 1000.0029 20a7e0fd.7fffd000. \ fd00.0000 - fd7f.ffff mapped to 77e.0000 Memsize dependent (Frame Buffer)
+ msr: 1000.002a 801ffcfe.007fe004. \ fe00.4000 - fe00.7fff mapped to 0 in DC space
+
+\ msr: 1000.002b 00000000.000fffff. \ Unmapped - default
+\ msr: 1000.002c 00000000.00000000. \ Unmapped - default (Swiss Cheese)
+
+ msr: 1000.0080 00000000.00000003. \ Coherency
+ msr: 1000.0082 80000000.00000000. \ Arbitration
+ msr: 1000.0083 00000000.0000ff00. \ Disable SMIs
+ msr: 1000.0084 00000000.0000ff00. \ Disable Async errors
+
+\ msr: 1000.00e0 000000ff.fff00000. \ Unmapped - default
+\ msr: 1000.00e1 000000ff.fff00000. \ Unmapped - default
+\ msr: 1000.00e2 000000ff.fff00000. \ Unmapped - default
+\ msr: 1000.00e3 00000000.00000000. \ Unmapped - default (Swiss Cheese)
+
+ msr: 1000.2002 0000001f.0000001f. \ Disables SMIs
+ msr: 1000.2004 00000000.00000005. \ Clock gating
+
+\ DMA incoming maps
+ msr: 4000.0020 20000000.000fff00. \ 0 - f.ffff low RAM, route to GLIU0
+ msr: 4000.0022 200000fe.000ffffc. \ fe00.0000 - fe00.03ff GP, route to GLIU0
+\ msr: 4000.0023 000000ff.fff00000. \ Unmapped - default
+ msr: 4000.0024 200000fe.004ffffc. \ fe00.4000 - fe00.7fff DC, route to GLIU0
+ msr: 4000.0025 400000fe.008ffffc. \ fe00.8000 - fe00.bfff VP, route to VP in GLIU1
+ msr: 4000.0026 a00000fe.00cffffc. \ fe00.c000 - fe00.ffff VIP, route to VP in GLIU1
+\ msr: 4000.0027 000000ff.fff00000. \ Unmapped - default
+\ msr: 4000.0028 000000ff.fff00000. \ Unmapped - default
+\ msr: 4000.0029 000000ff.fff00000. \ Unmapped - default
+ msr: 4000.002a 200000fd.7fffd000. \ frame buffer - fd00.0000 .. fd7f.ffff, route to GLIU0
+ msr: 4000.002b c00000fe.013fe010. \ Security Block - fe01.0000 .. fe01.3fff
+\ msr: 4000.002c 20000007.7ff00100. \ 10.0000 - 0f7f.ffff High RAM - Memsize dependent
+\ msr: 4000.002d 00000000.000fffff. \ Unmapped - default
+ msr: 4000.0080 00000000.00000001. \ Route coherency snoops from GLIU1 to GLIU0
+ msr: 4000.0081 00000000.0000c77f. \ Port active enable
+ msr: 4000.0082 80000000.00000000. \ Arbitration scheduling
+ msr: 4000.0083 00000000.0000ffff. \ Disable SMIs
+ msr: 4000.0084 00000000.00000008. \ Disable AERRs
+\ msr: 4000.0085 00000000.00000104. \ default
+\ msr: 4000.0086 20311030.0100400a. \ default
+
+\ msr: 4000.00e0 20000000.3c0fffe0. \ IOD_BM DC - VGA
+\ msr: 4000.00e1 000000ff.fff00000. \ Unmapped - default
+ msr: 4000.00e3 60000000.033000f0. \ Map reads and writes of Port F0 to GLCP, I think
+ msr: 4000.2002 0000001f.0000001f. \ Disables SMIs
+ msr: 4000.2004 00000000.00000005. \ Clock gating
+
+\ GeodeLink Priority Table
+ msr: 0000.2001 00000000.00000220.
+ msr: 4c00.2001 00000000.00000001.
+ msr: 5000.2001 00000000.00000027.
+ msr: 5800.2001 00000000.00000000.
+ msr: 8000.2001 00000000.00000320.
+\ msr: a000.2001 00000000.00000010. \ GX only
+
+ msr: 0000.1700 00000000.00000400. \ Evict clean lines - necessary for L2
+
+\ Region config
+\ msr: 0000.1808 25fff002.1077e000. \ System RAM and ROM region configs - Memsize dependent
+\ msr: 0000.180a 00000000.00000000.
+ msr: 0000.1800 00004000.00004022. \ Data memory - 4 outstanding write ser., evict
+ \ INVD => WBINVD, serialize load misses.
+ msr: 0000.180a 00000000.00000011. \ Disable cache for table walks
+ msr: 0000.180b 00000000.00000000. \ Cache a0000-bffff
+ msr: 0000.180c 00000000.00000000. \ Cache c0000-dffff
+ msr: 0000.180d 00000000.00000000. \ Cache e0000-fffff
+\ msr: 0000.180e 00000001.00000001. \ SMM off - default
+\ msr: 0000.180f 00000001.00000001. \ DMM off - default
+ msr: 0000.1810 fd7ff000.fd000111. \ Video (write through)
+ msr: 0000.1811 fe00f000.fe000101. \ GP + DC + VP + VIP registers non-cacheable
+\ msr: 0000.1812 00000000.00000000. \ Disabled - default
+\ msr: 0000.1813 00000000.00000000. \ Disabled - default
+\ msr: 0000.1814 00000000.00000000. \ Disabled - default
+\ msr: 0000.1815 00000000.00000000. \ Disabled - default
+\ msr: 0000.1816 00000000.00000000. \ Disabled - default
+\ msr: 0000.1817 00000000.00000000. \ Disabled - default
+
+\ PCI
+\ msr: 5000.2000 00000000.00105001. \ RO
+ msr: 5000.2001 00000000.00000017. \ Priority 1, domain 7
+ msr: 5000.2002 00000000.003f003f. \ No SMIs
+ msr: 5000.2003 00000000.00370037. \ No ERRs
+ msr: 5000.2004 00000000.00000015. \ Clock gating for 3 clocks
+ msr: 5000.2005 00000000.00000000. \ Enable some PCI errors
+ msr: 5000.2010 fff01120.001a021d. \ PCI timings
+ msr: 5000.2011 04000300.00800f01. \ GLPCI_ARB - LX page 581
+ msr: 5000.2014 00000000.00f000ff.
+ msr: 5000.2015 30303030.30303030. \ Cache, prefetch, write combine a0000 - bffff
+ msr: 5000.2016 30303030.30303030. \ Cache, prefetch, write combine c0000 - dffff
+ msr: 5000.2017 34343434.30303030. \ Cache, prefetch, write combine e0000 - fffff, write protect f0000 - fffff
+ msr: 5000.2018 000ff000.00000130. \ Cache PCI DMA to low memory 0 .. fffff
+\ msr: 5000.2019 0f7ff000.00100130. \ Cache PCI DMA to high memory - Memsize dependent
+\ msr: 5000.201a 4041f000.40400120.
+\ msr: 5000.201a 00000000.00000000. \ Off - default
+ msr: 5000.201b 00000000.00000000.
+ msr: 5000.201c 00000000.00000000.
+ msr: 5000.201e 00000000.00000f00.
+ msr: 5000.201f 00000000.0000004b.
+[ifdef] neptune
+ msr: 5000.201f 00000000.0000007b.
+[else]
+ msr: 5000.201f 00000000.0000004b.
+[then]
+\ We don't need posted I/O writes to IDE, as we have no IDE
+
+\ clockgating
+\ msr: 5400.2004 00000000.00000000. \ Clock gating - default
+\ msr: 5400.2004 00000000.00000003. \ Clock gating
+
+\ chipsetinit(nb);
+
+\ Set the prefetch policy for various devices
+ msr: 5150.0001 00000000.00008f000. \ AC97
+ msr: 5140.0001 00000000.00000f000. \ DIVIL
+
+\ Set up Hardware Clock Gating
+ msr: 5102.4004 00000000.000000004. \ GLIU_SB_GLD_MSR_PM
+ msr: 5100.0004 00000000.000000005. \ GLPCI_SB_GLD_MSR_PM
+ msr: 5170.0004 00000000.000000004. \ GLCP_SB_GLD_MSR_PM
+\ SMBus clock gating errata (PBZ 2226 & SiBZ 3977)
+ msr: 5140.0004 00000000.050554111. \ DIVIL
+ msr: 5130.0004 00000000.000000005. \ ATA
+ msr: 5150.0004 00000000.000000005. \ AC97
+
+\ setup_gx2();
+
+\ Graphics init
+\ msr: a000.2001 00000000.00000010. \ GP config (priority) \GX Only
+ msr: a000.2002 00000001.00000001. \ Disable GP SMI
+ msr: a000.2003 00000003.00000003. \ Disable GP ERR
+ msr: a000.2004 00000000.00000001. \ Clock gating
+ msr: 8000.2001 00000000.00000720. \ VG config (priority)
+ msr: 8000.2002 00001fff.00001fff. \ Disable SMIs
+ msr: 8000.2003 0000003f.0000003f. \ Disable ERRs
+\ msr: 8000.2004 00000000.00000000. \ Clock gating - default
+\ msr: 8000.2004 00000000.00000055. \ Clock gating
+ msr: 8000.2011 00000000.00000001. \ VG SPARE - VG fetch state machine hardware fix off
+ msr: 8000.2012 00000000.06060202. \ VG DELAY
+
+\ msr: 4c00.0015 00000037.00000001. \ MCP DOTPLL reset; unnecessary because of later video init
+
+\ More GLCP stuff
+ msr: 4c00.000f f2f100ff.56960444. \ I/O buffer delay controls
+ msr: 4c00.0016 00000000.00000000. \ Turn off debug clock
+ msr: 4c00.2004 00000000.00000015. \ Hardware clock gating for everything (Insyde uses 0x14)
+
+ msr: 5000.2014 00000000.00ffffff. \ Enables PCI access to low mem
+
+ msr: 4800.2001 00000000.00040c00. \ Set VP reference clock divider to 0xc, not 0xe
+
+\ 5536 region configs
+ msr: 5100.0002 00000000.007f0000. \ Disable SMIs
+ msr: 5101.0002 0000000f.0000000f. \ Disable SMIs
+
+\ msr: 5100.0010 44000020.00020013. \ PCI timings - already set
+ msr: 5100.0020 018b4001.018b0001. \ Region configs
+ msr: 5100.0021 010fc001.01000001. \ GPIO
+ msr: 5100.0022 0183c001.01800001. \ MFGPT
+ msr: 5100.0023 0189c001.01880001. \ IRQ mapper
+ msr: 5100.0024 0147c001.01400001. \ PMS
+ msr: 5100.0025 0187c001.01840001. \ ACPI
+ msr: 5100.0026 014fc001.01480001. \ AC97
+ msr: 5100.0027 fe01a000.fe01a001. \ OHCI
+ msr: 5100.0028 fe01b000.fe01b001. \ EHCI
+ msr: 5100.0029 efc00000.efc00001. \ UOC
+ msr: 5100.002b 018ac001.018a0001. \ IDE bus master
+ msr: 5100.002f 00084001.00084009. \ Port 84 (what??)
+ msr: 5101.0020 400000ef.c00fffff. \ P2D_BM0 UOC
+ msr: 5101.0023 500000fe.01afffff. \ P2D_BMK Descriptor 0 OHCI
+ msr: 5101.0024 400000fe.01bfffff. \ P2D_BMK Descriptor 1 EHCI
+ msr: 5101.0083 00000000.0000ff00. \ Disable SMIs
+[ifdef] lx-devel
+ msr: 5101.00e0 60000000.1f0ffff8. \ IOD_BM Descriptor 0 ATA IO address
+[then]
+ msr: 5101.00e1 a0000001.480fff80. \ IOD_BM Descriptor 1 AC97
+ msr: 5101.00e2 80000001.400fff80. \ IOD_BM Descriptor 2 PMS
+ msr: 5101.00e3 80000001.840fffe0. \ IOD_BM Descriptor 3 ACPI
+\ msr: 5101.00e4 00000001.858ffff8. \ IOD_BM Descriptor 4 Don't carve ACPI into partially-emulated ranges
+ msr: 5101.00e5 60000001.8a0ffff0. \ IOD_BM Descriptor 5 bus master IDE
+\ msr: 5101.00eb 00000000.f0301850. \ IOD_SC Descriptor 1 Don't carve ACPI into partially-emulated ranges
+
+[ifdef] lx-devel
+ msr: 5130.0008 00000000.000018a1. \ IDE_IO_BAR - IDE bus master registers
+[then]
+
+ msr: 5140.0002 0000fbff.00000000. \ Disable SMIs
+
+ msr: 5140.0008 0000f001.00001880. \ LBAR_IRQ
+ msr: 5140.0009 fffff001.fe01a000. \ LBAR_KEL (USB)
+ msr: 5140.000b f001.000018b0. \ LBAR_SMB
+ msr: 5140.000c f001.00001000. \ LBAR_GPIO
+ msr: 5140.000d f001.00001800. \ LBAR_MFGPT
+ msr: 5140.000e f001.00001840. \ LBAR_ACPI
+ msr: 5140.000f f001.00001400. \ LBAR_PMS
+\ msr: 5140.0010 fffff007.20000000. \ LBAR_FLSH0 no 5536 NAND FLASH on any LX platform
+\ msr: 5140.0011 \ LBAR_FLSH1
+\ msr: 5140.0012 \ LBAR_FLSH2
+\ msr: 5140.0013 \ LBAR_FLSH3
+\ msr: 5140.0014 00000000.80070003. \ LEG_IO already set in romreset
+ msr: 5140.0015 00000000.00000f7d. \ BALL_OPTS - IDE pins are IDE, not NAND
+\ msr: 5140.001b 00000000.07770777. \ NANDF_DATA - default
+\ msr: 5140.001c 00000000.00000777. \ NANDF_CTL - default
+ msr: 5140.001f 00000000.00000011. \ KEL_CTRL
+ msr: 5140.0020 00000000.bb350a00. \ IRQM_YLOW
+ msr: 5140.0021 00000000.04000000. \ IRQM_YHIGH
+ msr: 5140.0022 00000000.00002222. \ IRQM_ZLOW
+\ msr: 5140.0023 00000000.600aa5b2. \ IRQM_ZHIGH
+\ teo was here
+ msr: 5140.0023 00000000.60baa5b2. \ IRQM_ZHIGH
+ msr: 5140.0025 00000000.00001002. \ IRQM_LPC
+\ msr: 5140.0028 00000000.00000000. \ MFGPT_IRQ off - default
+\ msr: 5140.0040 00000000.00000000. \ DMA_MAP - default
+\ msr: 5140.004e 00000000.ef2500c0. \ LPC_SIRQ
+\ msr: 5140.004e 00000000.effd0080. \ LPC_SIRQ
+ msr: 5140.004e 00000000.effd00c0. \ LPC_SIRQ
+
+\ USB host controller
+ msr: 5120.0001 0000000b.00000000. \ USB_GLD_MSR_CONFIG - 5536 page 262
+ msr: 5120.0008 0000000e.fe01a000. \ USB OHC Base Address - 5536 page 266
+ msr: 5120.0009 0000200e.fe01b000. \ USB EHC Base Address - 5536 page 266 FLADJ set
+ msr: 5120.000b 00000002.efc00000. \ USB UOC Base Address - 5536 page 266
+
+\ Clear possible spurious USB Short Serial detect bit per 5536 erratum 57
+ msr: 5120.0015 00000010.00000000. \ USB_GLD_MSR_DIAG
+
+here msr-init - constant /msr-init
Added: cpu/x86/pc/neptune/msrscan.fth
===================================================================
--- cpu/x86/pc/neptune/msrscan.fth (rev 0)
+++ cpu/x86/pc/neptune/msrscan.fth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,212 @@
+\ Dump a bunch of MSR values
+: nn
+ safe-parse-word $number abort" bad number"
+;
+: msrloop
+ bounds ?do
+ i u. i rdmsr 11 ud.r cr
+ loop
+;
+: t
+ cr nn dup 8 u.r nn dup 4 u.r ." msrloop" cr msrloop
+;
+
+.( LX R/W MSRs) cr
+
+\ msr ranges:
+T 1000.2001 5
+T 1000.0020 d
+T 1000.0080 7
+T 1000.008c 2
+T 1000.00a1 2
+T 1000.00a5 2
+T 1000.00a9 2
+T 1000.00ad 2
+T 1000.00c0 8
+T 1000.00d0 10
+T 1000.00e0 9
+
+T 4000.2001 5
+T 4000.0020 f
+T 4000.0080 7
+T 4000.008c 2
+T 4000.00a1 2
+T 4000.00a5 2
+T 4000.00a9 2
+T 4000.00ad 2
+T 4000.00c0 8
+T 4000.00d0 10
+T 4000.00e0 9
+
+T 0000.2001 5
+
+\ 0000.0010 1 \ TSC
+\ 0000.00c1 2 \ perf event ctrs
+\ 0000.0174 3 \ cs, ss, sip
+\ 0000.0186 2 \ perf event ctr ctl
+
+T 0000.1100 1 \ instruction fetch configuration
+\ T 0000.1108 5 \ btb test
+
+T 0000.1210 2 \ exception configuration and mode
+T 0000.1250 1 \ ID configuration
+
+T 0000.1301 2 \ SMM and DMI
+
+T 0000.1700 1 \ IM config !!
+T 0000.1800 1 \ DM config !!
+T 0000.1801 1 \ DM config !!
+T 0000.1804 1 \ DM config !!
+T 0000.1808 1 \ def Region config
+T 0000.180a e \ Region configs
+
+\ A bunch of cache and tlb stuff
+
+T 0000.1900 2 \ bus controller configs
+
+\ 0000.1908 1 \ msr lock
+\ 0000.1910 1 \ real time stamp counter
+\ 0000.1911 1 \ TSC low dwords
+
+T 0000.1920 1 \ L2 cache config !!
+T 0000.1927 1 \ L2 cache treatment control !!
+T 0000.1930 1 \ Power mode !!
+
+T 0000.1980 4 \ memory subsystem array
+
+T 0000.1a00 1 \ FPU modes
+\ A bunch of FPU stuff
+
+\ A bunch of CPUID stuff
+
+\ -- Memory controller
+
+T 2000.2002 4
+
+T 2000.0018 3
+T 2000.001c 2
+T 2000.0020 1
+
+\ GP
+
+T a000.2001 5
+
+\ -- DC
+
+T 8000.2001 5
+T 8000.0012 1 \ DC RAM Control
+
+\ -- VP
+
+T 4800.2001 5
+
+T 4800.0010 2 \ VP Diagnostic and Pad Select
+
+\ GLCP
+
+T 4c00.2001 5
+
+T 4c00.0008 2
+T 4c00.000b 2
+\ 4c00.000d has status bits that can't be set directly
+T 4c00.000e 3
+T 4c00.0012 5
+
+T 4c00.0018 1 \ Clock throttling
+\ 4c00.0019 Reading this register causes entry to C2 state!
+T 4c00.001c 3 \ Throttle control
+\ T 4c00.0023 1 \ Debug interface
+T 4c00.0031 1 \ A20M !!
+T 4c00.0033 1 \ CPU INIT !!
+
+\ -- GLPCI
+
+T 5000.2001 5
+
+T 5000.2010 11
+
+
+\ 5536
+.( 5536 MSRs) cr
+
+\ -- MBSB
+
+T 5101.0000 6 \ Responds to 5101.2000 6 too
+T 5101.0020 7
+T 5101.0080 d
+T 5101.00a0 b
+T 5101.00c0 2
+T 5101.00d0 4
+T 5101.00e0 12
+
+\ -- GLPCI_SB
+
+T 5100.0000 6
+T 5100.0010 1
+T 5100.0020 15
+
+T 5150.0000 6
+
+\ AC natives: 0 80
+
+\ -- USB
+
+T 5120.0000 6
+T 5120.0008 4
+
+\ USB natives - OHC - 0 64 p 258
+\ USB natives - EHC - 0 a8 p 259
+
+\ -- ATA (don't care)
+
+T 5130.0000 6
+T 5130.0008 1
+T 5130.0010 6
+
+\ ATA natives - 0 5
+
+\ -- DIVIL (MDD)
+
+T 5140.0000 6
+T 5140.0008 2
+T 5140.000b 1b
+T 5140.0028 3
+T 5140.0037 a
+T 5140.004e 2
+T 5140.0054 4
+
+\ SMB natives 0 8
+\ KEL natives 100 10 (and port 92)
+\ UART natives 3f8 8 (and banks)
+\ DMA natives (isa stuff)
+\ RTC natives
+\ GPIO natives
+\ MFGPT natives (0 40)
+\ ACPI natives (emulated?)
+\ PM natives (emulated?)
+
+T 5170.0000 6
+T 5170.0008 9
+T 5170.00012 6
+
+0 [if]
+\ some native registers 0 50 by 4
+select screen
+.( GP) cr
+0 50 bounds ?do i u. i gp-base + l@ 9 u.r cr 4 +loop
+
+\ DC native registers 0 90
+
+.( DC) cr
+0 90 bounds ?do i u. i dc@ 9 u.r cr 4 +loop
+
+\ VP native registers - 0 134
+
+.( VP) cr
+ok 0 134 bounds ?do i u. i vp@ 9 u.r cr 4 +loop
+
+\ flat panel 400 70 by 4
+\ ok 400 70 bounds ?do i u. i vp@ 9 u.r cr 4 +loop
+\ --- all 0 (system has no dcon) --
+
+[then]
Added: cpu/x86/pc/neptune/neptune.bth
===================================================================
--- cpu/x86/pc/neptune/neptune.bth (rev 0)
+++ cpu/x86/pc/neptune/neptune.bth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,94 @@
+purpose: Construct the Open Firmware module collection
+
+command: &builder &this
+in: ${BP}/cpu/x86/pc/neptune/build/romreset.di
+\ in: ${BP}/cpu/x86/pc/neptune/build/resume.di
+in: ${BP}/cpu/x86/pc/neptune/build/rmstart.img
+in: ${BP}/cpu/x86/pc/neptune/build/paging.di
+in: ${BP}/cpu/x86/pc/neptune/build/fw.dic
+in: ${BP}/dev/geode/nandflash/build/nandflash.fc
+in: ${BP}/dev/geode/ac97/build/ac97.fc
+in: ${BP}/dev/usb2/hcd/ohci/build/ohci.fc
+in: ${BP}/dev/usb2/hcd/ehci/build/ehci.fc
+in: ${BP}/dev/usb2/device/hub/build/hub.fc
+in: ${BP}/dev/usb2/device/net/build/usbnet.fc
+in: ${BP}/dev/usb2/device/serial/build/usbserial.fc
+in: ${BP}/dev/usb2/device/storage/build/usbstorage.fc
+in: ${BP}/dev/usb2/device/keyboard/build/usbkbd.fc
+in: ${BP}/dev/pci/build/pcibridg.fc
+in: ${BP}/dev/dnet/build/dnet.fc
+\ in: ${BP}/clients/memtest86/memtest
+
+build-now
+
+fload ${BP}/cpu/x86/pc/neptune/versions.fth
+" macro: FW_VERSION DA${FW_MAJOR}${FW_MINOR}" expand$ eval
+
+
+fload ${BP}/cpu/x86/pc/neptune/config.fth
+
+\ Always re-create the builton.fth file when we make a new rom.img
+fload ${BP}/cpu/x86/pc/builton.bth
+
+fload ${BP}/forth/lib/crc32.fth
+
+hex
+
+: pad-file ( location -- )
+ ofd @ fsize
+ 2dup u< abort" The ROM image is too large"
+ ?do h# ff ofd @ fputc loop
+;
+
+.( --- Saving as neptune.rom - Direct ROM format) cr
+writing neptune.rom
+ " romreset.di" $add-file
+\ " resume.di" $add-file
+
+ " paging.di" $add-file
+ " ${BP}/cpu/x86/build/inflate.bin" " inflate" $add-dropin
+ " fw.img" " firmware" $add-deflated-dropin
+
+ " ${BP}/dev/usb2/hcd/ohci/build/ohci.fc" " class0c0310" $add-deflated-dropin
+ " ${BP}/dev/usb2/hcd/ehci/build/ehci.fc" " class0c0320" $add-deflated-dropin
+ " ${BP}/dev/usb2/device/hub/build/hub.fc" " usb,class9" $add-dropin
+ " ${BP}/dev/usb2/device/net/build/usbnet.fc" " usbnet" $add-deflated-dropin
+ " ${BP}/dev/usb2/device/keyboard/build/usbkbd.fc" " usb,class3,1" $add-dropin
+ " ${BP}/dev/usb2/device/serial/build/usbserial.fc" " usbserial" $add-deflated-dropin
+ " ${BP}/dev/usb2/device/storage/build/usbstorage.fc" " usbstorage" $add-deflated-dropin
+
+ " ${BP}/dev/geode/ac97/build/ac97.fc" " pci1022,2093" $add-deflated-dropin
+
+ " builton.fth" " probe-" $add-dropin
+ " ${BP}/ofw/fcode/memtest.fth" " memtest.fth" $add-deflated-dropin
+
+ " ${BP}/ofw/inet/telnetd.fth" " telnetd" $add-deflated-dropin
+
+ " ${BP}/ofw/termemu/gallant.obf" " font" $add-deflated-dropin
+
+ " ${BP}/dev/dnet/build/dnet.fc" " pci1573,da0e" $add-deflated-dropin
+
+[ifdef] use-memtest86
+ " ${BP}/clients/memtest86/memtest" " memtest" $add-deflated-dropin
+[then]
+ " ${BP}/dev/pci/build/pcibridg.fc" " class060400" $add-deflated-dropin
+
+ /rom h# 400 - pad-file \ rmstart image must start 0x400 from end
+ " rmstart.img" $add-file
+
+\ Insert the revision signature
+/rom h# 40 - ofd @ fseek
+" DA1 ${FW_VERSION} D1${FW_MAJOR}" expand$ ofd @ fputs
+
+/l buffer: crcbuf
+/rom buffer: filebuf
+0 ofd @ fseek
+
+\ Read the entire image, compute the CRC, and store it h# 30 from the end
+filebuf /rom ofd @ fgets /rom <> abort" Can't read back image"
+0 crctab filebuf /rom ($crc) crcbuf !
+
+/rom h# 30 - ofd @ fseek
+crcbuf /l ofd @ fputs
+
+ofd @ fclose
Added: cpu/x86/pc/neptune/pcinode.fth
===================================================================
--- cpu/x86/pc/neptune/pcinode.fth (rev 0)
+++ cpu/x86/pc/neptune/pcinode.fth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,111 @@
+\ See license at end of file
+purpose: PCI bus package
+
+[ifdef] addresses-assigned
+\ patch false true master-probe
+: nonvirtual-probe-state? ( -- flag )
+ my-space preassigned-pci-slot? if false else probe-state? then
+;
+patch nonvirtual-probe-state? probe-state? map-in
+
+\ patch noop assign-all-addresses prober
+warning @ warning off
+: assign-pci-addr ( phys.lo phys.mid phys.hi len | -1 -- phys.hi paddr size )
+ 2dup -1 <> swap preassigned-pci-slot? and if ( phys.lo phys.mid phys.hi len )
+ 2swap 2drop >r ( phys.hi r: len )
+ dup config-l@ 1 invert and r> ( phys.hi paddr len )
+ exit
+ then
+ assign-pci-addr
+;
+warning !
+
+: ?clear-addresses ( -- )
+ my-space preassigned-pci-slot? if exit then clear-addresses
+;
+patch ?clear-addresses clear-addresses populate-device-node
+patch ?clear-addresses clear-addresses populate-device-node
+
+: ?temp-assign-addresses ( -- )
+ my-space preassigned-pci-slot? if exit then temp-assign-addresses
+;
+
+patch ?temp-assign-addresses temp-assign-addresses find-fcode?
+
+\ These patches leave devices turned on
+\ patch 2drop my-w! populate-device-node
+\ : or-w! ( bitmask reg# -- ) tuck my-w@ or swap my-w! ;
+\ patch or-w! my-w! find-fcode?
+\ patch 2drop my-w! find-fcode?
+[then]
+
+h# 0000 encode-int " slave-only" property
+h# 0000 encode-int \ Mask of implemented add-in slots
+" slot-names" property
+
+also forth definitions
+
+ " 2,3,4,5,6,7,8,9,a,b,c,d,e,f" dup config-string pci-probe-list
+
+previous definitions
+
+h# b000.0000 to first-mem
+h# c000.0000 to mem-space-top
+h# 0000.8000 to first-io \ Avoid mappings established by BIOS
+
+\ Determine the parent interrupt information (the "interrupt line" in PCI
+\ parlance) from the child's "interrupt pin" and the child's address,
+\ returning "int-line true" if the child's interrupt line register should
+\ be set or "false" otherwise.
+: assign-int-line ( phys.hi.func INTx -- irq true )
+ \ Reiterate the value that is already in the int line register,
+ \ which was placed there by lower level init code
+
+ \ XXX unnecessary if we do VSA
+ over h# f800 and h# 7000 = if 2drop h# b true exit then
+
+ drop h# 3c + config-b@ true
+;
+
+\ Just use the global versions
+warning @ warning off
+: config-b@ ( config-adr -- b ) config-b@ ;
+: config-w@ ( config-adr -- w ) config-w@ ;
+: config-l@ ( config-adr -- l ) config-l@ ;
+: config-b! ( b config-adr -- ) config-b! ;
+: config-w! ( w config-adr -- ) config-w! ;
+: config-l! ( l config-adr -- ) config-l! ;
+warning !
+
+\ The io-base handling really ought to be in the root node, but
+\ that would require more changes than I'm willing to do at present.
+warning @ warning off
+: map-out ( vaddr size -- )
+ over io-base u>= if 2drop exit then ( vaddr size )
+ map-out ( )
+;
+warning !
+
+\ LICENSE_BEGIN
+\ Copyright (c) 2006 FirmWorks
+\
+\ Permission is hereby granted, free of charge, to any person obtaining
+\ a copy of this software and associated documentation files (the
+\ "Software"), to deal in the Software without restriction, including
+\ without limitation the rights to use, copy, modify, merge, publish,
+\ distribute, sublicense, and/or sell copies of the Software, and to
+\ permit persons to whom the Software is furnished to do so, subject to
+\ the following conditions:
+\
+\ The above copyright notice and this permission notice shall be
+\ included in all copies or substantial portions of the Software.
+\
+\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+\
+\ LICENSE_END
Added: cpu/x86/pc/neptune/probemem.fth
===================================================================
--- cpu/x86/pc/neptune/probemem.fth (rev 0)
+++ cpu/x86/pc/neptune/probemem.fth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,123 @@
+\ See license at end of file
+purpose: Create memory node properties and lists
+
+\ All RAM, including that assigned to the frame buffer
+: total-ram ( -- ramsize )
+ h# 20000018 msr@ nip ( msr.hi )
+ dup d# 12 rshift h# f and ( msr.hi dimm0size-code )
+ d# 22 + 1 swap lshift ( msr.hi dimm0size )
+ swap dup h# f0000 and h# 70000 = if ( dimm0size msr.hi )
+ \ DIMM1 Not Installed
+ drop ( total-size )
+ else ( dimm0size msr.hi )
+ d# 28 rshift h# f and ( dimm0size dimm1size-code )
+ d# 22 + 1 swap lshift ( dimm0size dimm1size )
+ + ( total-size )
+ then
+;
+
+\ Offset of frame buffer/display memory within the memory array
+: fb-offset ( -- offset ) h# 1808 msr@ drop h# 0fffff00 and 4 lshift ;
+
+\ Excludes RAM assigned to the frame buffer
+: system-ram ( -- extant avail )
+ fb-offset
+;
+
+\ This may require adjustment if we steal additional SMI memory
+: fbsize ( -- ) total-ram system-ram - ;
+
+dev /memory
+
+\ Excludes RAM already used for page tables
+: ram-limit ( -- addr ) mem-info-pa la1+ l@ ;
+
+: release-range ( start-adr end-adr -- ) over - release ;
+
+: probe ( -- )
+ 0 total-ram reg \ Report extant memory
+
+ \ Put h# 10.0000-1f.ffff and 28.0000-memsize in pool,
+ \ reserving 0..10.0000 for the firmware
+ \ and 20.0000-27.ffff for the "flash"
+
+\ h# 0.0000 h# 02.0000 release \ A little bit of DMA space, we hope
+\ h# 10.0000 h# 0f.ffff release
+\ h# 28.0000 h# 80.0000 release-range
+
+\ Release some of the first meg, between the page tables and the DOS hole,
+\ for use as DMA memory.
+ mem-info-pa 2 la+ l@ h# a.0000 release-range \ Below DOS hole
+
+[ifdef] virtual-mode
+ \ Release from 1M up to the amount of unallocated (so far) memory
+ dropin-base ram-limit u< if
+ \ Except for the area that contains the dropins, if they are in RAM
+ h# 10.0000 dropin-base release-range
+ dropin-base dropin-size + ram-limit release-range
+ else
+ h# 10.0000 ram-limit release-range
+ then
+[else]
+ h# 10.0000 system-ram release-range
+
+ fw-pa /fw-ram 0 claim drop
+
+ \ Account for the dropin area if it is in RAM
+ dropin-base system-ram u< if
+ dropin-base dropin-size 0 claim
+ then
+
+ initial-heap swap >physical swap 0 claim drop
+[then]
+;
+
+[ifndef] 8u.h
+: 8u.h ( n -- ) push-hex (.8) type pop-base ;
+[then]
+: .chunk ( adr len -- ) ." Testing memory at: " swap 8u.h ." size " 8u.h cr ;
+: selftest ( -- error? )
+ " available" get-my-property if ." No available property" cr true exit then
+ ( adr len )
+ begin ?dup while
+ 2 decode-ints swap ( rem$ chunk$ )
+ 2dup .chunk ( rem$ chunk$ )
+[ifdef] virtual-mode
+ 2dup over swap 3 mmu-map ( rem$ chunk$ )
+[then]
+ memory-test-suite if 2drop true exit then ( rem$ )
+ repeat drop
+ false
+;
+
+device-end
+
+also forth definitions
+stand-init: Probing memory
+ " probe" memory-node @ $call-method
+;
+previous definitions
+
+\ LICENSE_BEGIN
+\ Copyright (c) 2006 FirmWorks
+\
+\ Permission is hereby granted, free of charge, to any person obtaining
+\ a copy of this software and associated documentation files (the
+\ "Software"), to deal in the Software without restriction, including
+\ without limitation the rights to use, copy, modify, merge, publish,
+\ distribute, sublicense, and/or sell copies of the Software, and to
+\ permit persons to whom the Software is furnished to do so, subject to
+\ the following conditions:
+\
+\ The above copyright notice and this permission notice shall be
+\ included in all copies or substantial portions of the Software.
+\
+\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+\
+\ LICENSE_END
Added: cpu/x86/pc/neptune/rmstart.bth
===================================================================
--- cpu/x86/pc/neptune/rmstart.bth (rev 0)
+++ cpu/x86/pc/neptune/rmstart.bth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,11 @@
+\ See license at end of file
+purpose: Build script fo x86 real mode startup code.
+
+command: &builder &this
+build-now
+
+\ To do this on the geode, extra init may be necessary
+\ create debug-reset
+
+fload ${BP}/cpu/x86/pc/neptune/config.fth
+fload ${BP}/cpu/x86/pc/neptune/rmstart.fth
Added: cpu/x86/pc/neptune/rmstart.fth
===================================================================
--- cpu/x86/pc/neptune/rmstart.fth (rev 0)
+++ cpu/x86/pc/neptune/rmstart.fth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,310 @@
+\ See license at end of file
+purpose: x86 real mode startup code.
+
+command: &native &this
+build-now
+
+\ 386/486 processors begin executing at address ffff.fff0 in real mode
+\ when they come out of reset. Normally, that address would not be
+\ accessable in real mode, but the processor does some magic things to
+\ the Code Segment register so that the high order address lines are
+\ "boosted" up to the ffff.xxxx range just after reset. The "boosting"
+\ persists until the CS register is modified (i.e. with a far jump).
+
+\ The other segment register are not "boosted", so they can only access
+\ the normal real mode range, essentially just the first megabyte.
+
+\ The startup code must establish a Global Descriptor Table containing
+\ suitable mappings, and then enter protected mode. The space between
+\ ffff.fff0 and the end of the ROM is insufficient to do this, so the
+\ first few instructions must jump elsewhere, to a place where there
+\ is enough room.
+
+\ The code below is rather tricky, especially since the Forth assembler
+\ always assumes 32-bit operand size and 32-bit addressing modes.
+\ The code is executing in 16-bit mode, so the assembler must be used
+\ carefully to ensure generation of the correct opcodes, and override
+\ prefixes where necessary.
+
+
+\needs start-assembling fload ${BP}/cpu/x86/asmtools.fth
+\needs write-dropin fload ${BP}/forth/lib/mkdropin.fth
+
+hex
+
+start-assembling
+hex
+
+\ Addresses where the following items will be located in the processor's
+\ physical address space:
+
+\ ffff.fc00: GDT ( 3 entries ) + padding
+\ ffff.fc20: GDT address + size ( 6 bytes ) plus padding
+\ ffff.fc28: Startup code plus padding
+\ ffff.fff0: Reset entry point - jump to startup code plus padding to end
+
+\ Assembler macros for startup diagnostics
+
+\ write a byte to an ISA port
+: risa-c! ( n a - ) " # dx mov # al mov al dx out " evaluate ;
+
+: num>asc ( al: b -- al: low ah: hi )
+ " al ah mov " evaluate
+ " h# f # al and " evaluate
+ " h# 9 # al cmp > if h# 57 # al add else h# 30 # al add then " evaluate
+
+ " ah shr ah shr ah shr ah shr " evaluate \ shift down four bits
+ " h# f # ah and " evaluate
+ " h# 9 # ah cmp > if h# 57 # ah add else h# 30 # ah add then " evaluate
+
+ " al bl mov ah al mov bl ah mov " evaluate
+
+;
+
+[ifdef] debug-reset
+.( debug reports enabled ) cr
+\ Assembler macro to assemble code to send the character "char" to COM1
+: report ( char -- )
+ " begin 3fd # dx mov dx al in 20 # al and 0<> until" evaluate
+ ( char ) " # al mov 3f8 # dx mov al dx out " evaluate
+ " begin 3fd # dx mov dx al in 20 # al and 0<> until" evaluate
+;
+\ Put character in al
+: reportc
+ " al ah mov " eval
+ " begin 3fd # dx mov dx al in 20 # al and 0<> until" evaluate
+ ( char ) " ah al mov 3f8 # dx mov al dx out " evaluate
+ " begin 3fd # dx mov dx al in 20 # al and 0<> until" evaluate
+;
+: init-com1 ( -- )
+ 1 3fc risa-c! \ DTR on
+ 80 3fb risa-c! \ Switch to bank 1 to program baud rate
+ 01 3f8 risa-c! \ Baud rate divisor low - 115200 baud
+ 0 3f9 risa-c! \ Baud rate divisor high - 115200 baud
+ 3 3fb risa-c! \ 8 bits, no parity, switch to bank 0
+;
+
+[else]
+: report ( char -- ) drop ;
+: reportc ( -- ) ;
+[then]
+
+hex
+
+\ odds for testing, evens for release
+d# 8 constant loader-version# \ monotonic
+2 constant loader-format# \ >1 when crc present
+
+.( ROM loader: version# ) loader-version# .d
+.( , format# ) loader-format# .d cr
+
+\ Real Mode Startup
+
+hex
+
+label rm-startup \ Executes in real mode with 16-bit operand forms
+
+ \ ffff.fc00 GDT
+
+ 0 w, 0 l, 0 w, \ 0 Mandatory null descriptor
+ 0 w, 0 l, 0 w, \ * Another null descriptor
+ ffff w, 9b.000000 l, 00.c.f w, \ 10 Code, linear=physical, full 4Gbytes
+ ffff w, 93.000000 l, 00.c.f w, \ 18 Data, linear=physical, full 4Gbytes
+
+ \ ffff.fc20 GDT limit + address
+
+ 1f w, ffff.fc00 l, \ # slots (4 * 8 - 1) , starting address
+ 0 w, \ Padding
+
+ \ ------->>>>> Startup code, reached by branch from main entry point below
+ \
+ \ ffff.fc28
+
+ here \ Mark the beginning of this code so its size may be determined
+ \ and so that a jump to it may be assembled later.
+
+ 16-bit
+
+ h# 01 # al mov al h# 80 # out
+
+ \ This code is highly optimized because it runs when the CPU is in
+ \ it slowest operation mode, so we want to get it done fast.
+ \ GLCP_SYS_RSTPLL - page 406
+ \ If the PLL is already set up, we don't redo the 5536 setup
+ op: h# 4c000014 # cx mov rdmsr \ MSR value in dx,ax
+ al bl mov
+ op: h# fc00.0000 # ax and 0= if \ Start the PLL if not already on
+
+[ifndef] lx-pll-autoconfig
+ 0 [if]
+ \ pll manual configuration
+ rdmsr \ Get base MSR value with divisors
+ op: h# 07de.0000 # ax or \ Set the startup time (de) and breadcrumb (4)
+ \ op: h# 0000.025d # dx mov \ from coreboot
+ \ op: h# 0000.03d7 # dx mov \ PLL value for 333 MB clk, 500 CPU
+ op: h# 0000.04d9 # dx mov \ PLL value for 333 MB clk, 433 CPU
+
+ wrmsr \ Put in the base value
+ op: h# 0000.1800 invert # ax and \ Turn off the BYPASS bits
+
+ h# 6001 # ax or \ Set PD, RESETPLL
+
+ [else]
+ \ pll manual configuration (easier version..)
+
+ \ op: h# 0000.03DD # dx mov \ 500 MHz + 266 MHz
+ \ op: h# 0000.02DD # dx mov \ 500 MHz + 200 MHz
+ \ op: h# 0000.02D5 # dx mov \ 400 MHz + 200 MHz
+ \ op: h# 0000.04d9 # dx mov \ 433 MHz + 333 MHz
+ op: h# 0000.04DD # dx mov \ 500 MHz + 333 MHz
+ \ op: h# 0000.05DD # dx mov \ 500 MHz + 400 MHz
+
+
+ \ op: h# 04DE.6001 # ax mov
+ op: h# 04FF.6001 # ax mov \ longer reset time for pll startup
+
+ [then]
+
+[else]
+ \ pll auto configuration from bootstrap pin
+
+ op: h# 00ff.0000 invert # ax and
+ op: h# 00de.0000 # ax or
+
+ op: h# 0000.1800 invert # ax and
+ op: h# 0700.6001 # ax or
+[then]
+ wrmsr \ Start the PLL and reset the CPU
+ then
+
+ \ Return to here after the reset
+ h# 02 # al mov al h# 80 # out
+
+[ifdef] init-com1
+ init-com1
+[then]
+
+[ifdef] debug-reset
+carret report \ send it to com1 if you can...
+linefeed report \ send it to com1 if you can...
+ascii F report \ send it to com1 if you can...
+[then]
+
+ \ The following instruction uses the CS: segment override because
+ \ that segment is currently "boosted" up into the ROM space.
+ \ It uses the operation size override to load a 32-bit pointer.
+ \ The address override is not used; the GDT limit/address data structure
+ \ above is reachable with a 16-bit address and through the "boosted"
+ \ code segment.
+
+ op: cs: 0f c, 01 c, 16 c, fc20 w, \ lgdte cs:[fc20] Setup GDT
+
+ op: cr0 bx mov \ Get existing CR0 value
+
+ 1 # bl or \ Set "protected mode" bit
+
+ bx cr0 mov \ Enter protected mode
+ eb c, 0 c, \ jmp to next location to flush prefetch queue
+ \ note: CPL is now 0
+
+ h# 03 # al mov al h# 80 # out
+
+ \ We are in protected mode, but we are still executing from old
+ \ 16-bit code segment, and will continue to do so until the far jump
+ \ below
+
+[ifdef] debug-reset
+ascii o report
+[then]
+
+ \ set segment registers
+ bx bx xor \ Clear high byte
+ 18 # bl mov \ Data segment selector
+ bx ds mov \ Set segment register
+ bx es mov \ Set segment register
+ bx fs mov \ Set segment register
+ bx gs mov \ Set segment register
+
+[ifdef] debug-reset
+ascii r report
+[then]
+
+ bx ss mov \ Set segment register
+
+[ifdef] debug-reset
+ascii t report
+ascii h report
+[then]
+
+ h# 0f # al mov al h# 80 # out
+
+ op: h# 1430 # dx mov op: dx ax in op: h# 9999 # ax cmp = if
+ h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34
+ h# 0f # al mov al h# 71 # out \ Write value 01
+ then
+
+ op: ad: ResetBase h# 10 #) far jmp \ Jump to Forth startup
+
+ \ Pad the startup code so that the main entry point ends up at the
+ \ correct address.
+
+ here over - ( adr , size-of-preceding-code )
+
+ \ ffff.fc28 is the location of the code that follows the GDT
+ ffff.fff0 ffff.fc28 - swap - ( address #bytes-to-pad )
+
+ \ The code mustn't extend past ffff.ffc0, because that is where PC
+ \ manufacturers put the 0x10-byte BIOS version string.
+ dup h# 30 - also forth 0< previous abort" Real mode startup code is too big"
+
+ also forth here over h# ff fill previous \ fill with FFs
+ ( #bytes-to-pad ) allot \ Pad out to ffff.fff0
+
+ \ ------->>>>> Main Entry Point
+ \
+ \ ffff.fff0 - This is the hardwired address where the processor jumps
+ \ when it comes out of reset
+
+ 16-bit
+
+ cli cld \ Turn off interrupts (does not affect NMI)
+ #) jmp \ Relative jump back to ffff.fc28
+ 0 w, 0 c, \ align "pad" to end of ROM
+ loader-version# l, \ version#
+ loader-format# w, \ "format" (>1 when crc present)
+ ffff w, \ placeholder for crc
+
+end-code
+
+end-assembling
+
+writing rmstart.img
+rm-startup here over - ofd @ fputs
+ofd @ fclose
+
+here rm-startup - constant /rm-startup
+/rm-startup h# 400 <> abort" Real mode startup code is not the right size"
+
+\ LICENSE_BEGIN
+\ Copyright (c) 2006 FirmWorks
+\
+\ Permission is hereby granted, free of charge, to any person obtaining
+\ a copy of this software and associated documentation files (the
+\ "Software"), to deal in the Software without restriction, including
+\ without limitation the rights to use, copy, modify, merge, publish,
+\ distribute, sublicense, and/or sell copies of the Software, and to
+\ permit persons to whom the Software is furnished to do so, subject to
+\ the following conditions:
+\
+\ The above copyright notice and this permission notice shall be
+\ included in all copies or substantial portions of the Software.
+\
+\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+\
+\ LICENSE_END
Added: cpu/x86/pc/neptune/romreset.bth
===================================================================
--- cpu/x86/pc/neptune/romreset.bth (rev 0)
+++ cpu/x86/pc/neptune/romreset.bth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,199 @@
+\ See license at end of file
+purpose: Build file for dropin dispatcher - version for direct ROM startup
+
+command: &builder &this
+build-now
+
+fload ${BP}/cpu/x86/pc/neptune/config.fth \ Address configuration
+
+
+\needs start-assembling fload ${BP}/cpu/x86/asmtools.fth
+\needs write-dropin fload ${BP}/forth/lib/mkdropin.fth
+
+fload ${BP}/cpu/x86/mmuparam.fth
+
+\ startmacros.fth defines some assembler macros that make MSR and I/O port
+\ access very easy by hiding the details of register use.
+
+fload ${BP}/dev/geode/startmacros.fth
+
+hex
+
+fload ${BP}/cpu/x86/pc/finddi.fth \ find-dropin and other tools
+
+h# 3e.0000 constant inflate-base
+h# 30.0000 constant workspace
+
+: pulse-tp ( -- )
+ [ also assembler ]
+ 1. 4c00.0016 set-msr
+ 10. 4c00.000c set-msr
+ 20. 4c00.000c set-msr
+ 10. 4c00.000c set-msr
+ [ previous ]
+;
+
+
+start-assembling
+
+label my-entry
+ e9 c, 0 , \ To be patched later
+end-code
+
+[ifdef] debug-startup
+fload ${BP}/cpu/x86/pc/dot.fth \ Numeric output
+[then]
+
+fload ${BP}/cpu/x86/pc/romfind.fth \ find-dropin
+
+label startup
+ h# 10 # al mov al h# 80 # out
+
+ \ The next few MSRs allow us to access the 5536
+ \ EXTMSR - page 449 \ Use PCI device #F for port 2
+ 00000000.00000f00. 5000201e set-msr \ cs5536_setup_extmsr(void)
+
+ \ write IDSEL to the write once register at address 0x0000
+ 02000000 0 port-wl \ This is the default value so we need not set it
+
+ \ setup CPU interface serial to mode C on both sides
+ 44000020.00200013. 51000010 set-msr \ 5536 p 229
+
+ \ Set up GPIO base register
+ 0000f001.00001000. 5140000c set-msr \ GPIO BAR
+
+
+ \ Init Internal UART
+ \ enable GPIO 8 to OUT AUX1, 9 to IN_AUX1
+ 100 dup 1004 port-wl 1010 port-wl \ GPIOL_OUTPUT_ENABLE, GPIOL_OUT_AUX1_SELECT
+ 200 dup 1020 port-wl 1034 port-wl \ GPIOL_INPUT_ENABLE, GPIOL_IN_AUX1_SELECT
+
+ \ set address to 3f8
+ 51400014 rmsr \ MDD_LEG_IO
+ h# 00007.0000 # ax or
+ 51400014 wmsr
+
+
+ 00000000.00000001. 5140003A set-msr \ SOFTRESET->MDD_UART1_CONF
+ 00000000.00000012. 5140003A set-msr \ DEVEN | EN_BANKS -> MDD_UART1_CONF
+
+
+ \ uart_init,serial.c
+ \ This is a garden-variety 8250 UART setup sequence
+ 0 3f9 port-wb \ disable interrupt
+ 1 3fa port-wb
+ 83 3fb port-wb \ DLAB
+ 1 3f8 port-wb \ 115200 divisor low
+ 0 3f9 port-wb \ 115200 divisor high
+ 3 3fb port-wb \ !DLAB
+ \ At this point we could send characters out the serial port
+ \ End of serial init
+
+ char + 3f8 port-wb begin 3fd port-rb 40 bitand 0<> until
+
+ h# 11 # al mov al h# 80 # out
+ \ Init memory controller
+
+ \ sdram_initialize,generic_sdram.c
+ \ sdram_set_spdregisters(),auto.c
+
+ \ The LX devel board has only 512M ROM, but assigning 1M of address space is harmless
+ 25fff002.10f80000. 1808 set-msr \ 1M ROM at fff0.0000, system RAM limit at 0f80.0000
+ 2000000f.7ff00100. 10000028 set-msr \ Top of memory at 0f7f.ffff
+ 212800fd.7fffd000. 10000029 set-msr \ Range Offset - Frame buffer at PA fd00.0000 maps to RAM at 0f80.0000
+\ XXX do we need to make the OFW area cacheable via MSR 1817 ?
+ 10076013.00005040. 20000018 set-msr \ DIMM1 empty, DIMM0 256 MB, 1 module bank, 8K pages
+ 2000000f.7ff00100. 4000002c set-msr \ DMA to memory from 1M to RAM limit at 0f80.0000
+ 0f7ff000.00100130. 50002019 set-msr \ PCI DMA to memory from 1M to RAM limit at 0f80.0000
+
+ \ 20000019 rmsr \ SDRAM timing and mode program
+
+ 00000000.2814d352. 00001981 set-msr \ Memory delay values
+ 00000000.1068334d. 00001982 set-msr \ Memory delay values
+ 00000106.83104104. 00001983 set-msr \ Memory delay values
+ 00000000.00000001. 00001980 set-msr \ Enable memory delays
+
+ \ olpc: 18000100.3b8332a3.
+ \ coreboot: 18000100. 364221a3.
+ \ coreboot: nuovo pll 386222a3
+ 18000100.364221a3. 20000019 set-msr
+
+ \ The RAM controller is now set up
+
+ \ Init the SDRAMs
+ \ sdram_enable,src/northbridge/amd/gx2/raminit.c
+
+ \ Clock gating for PMode
+ \ Clocks always on in mode 1, hardware gating in mode 0
+\ 20002004 rmsr 4 bitclr 1 bitset 20002004 wmsr \ GX p 199
+ 1. 20002004 set-msr \ GX p 199
+
+ \ Delay on exit from power mode 1, use unbuffered RAM
+ 140dd101. 2000001a set-msr \ MC_CF1017_DATA LX p 231
+ 00000200.00000000. 20000020 set-msr \ Power mode entry and exit delays
+
+ \ Unmask CKE1 and CKE0
+ 1000. 2000001d set-msr \ MC_CFCLK_DBG Clear 300 bits, don't tristate in IDLE
+
+ \ Reset memory controller
+ 20000018 rmsr \ MC_CF07_DATA
+ 2 bitset 20000018 wmsr
+ 2 bitclr 20000018 wmsr
+
+ char b 3f8 port-wb begin 3fd port-rb 40 bitand 0<> until
+ h# 12 # al mov al h# 80 # out
+
+fload ${BP}/dev/geode/draminit.fth
+
+ \ Last-minute check for LX erratum 34 - reset if the DLL didn't start correctly
+ h# 4c000017 rmsr h# 10 bitand 0<> if \ LX branch
+ h# 4c00000f rmsr h# 7ff bitclr h# 4 bitset h# 4c00000f wmsr \ Set DLL_OV
+ h# 4c00000f rmsr h# 7ff # ax and h# 104 # ax cmp = if \ Check the result
+ \ The value 104 indicates that the DLL did not start, so we must reset
+ char x 3f8 port-wb begin 3fd port-rb 40 bitand 0<> until
+ h# FA # al mov al h# 80 # out
+ 1. 5140.0017 set-msr
+ then
+ then
+
+ \ Now we can use the stack and do conventional subroutine calls
+
+ h# 1f # al mov al h# 80 # out
+ fload ${BP}/cpu/x86/pc/resetend.fth
+
+ char c 3f8 port-wb begin 3fd port-rb 40 bitand 0<> until
+end-code
+
+also 386-assembler
+startup my-entry put-branch
+previous
+
+end-assembling
+
+writing romreset.di
+asm-base here over - 0 " reset" write-dropin
+ofd @ fclose
+
+\ LICENSE_BEGIN
+\ Copyright (c) 2006 FirmWorks
+\
+\ Permission is hereby granted, free of charge, to any person obtaining
+\ a copy of this software and associated documentation files (the
+\ "Software"), to deal in the Software without restriction, including
+\ without limitation the rights to use, copy, modify, merge, publish,
+\ distribute, sublicense, and/or sell copies of the Software, and to
+\ permit persons to whom the Software is furnished to do so, subject to
+\ the following conditions:
+\
+\ The above copyright notice and this permission notice shall be
+\ included in all copies or substantial portions of the Software.
+\
+\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+\
+\ LICENSE_END
Added: cpu/x86/pc/neptune/versions.fth
===================================================================
--- cpu/x86/pc/neptune/versions.fth (rev 0)
+++ cpu/x86/pc/neptune/versions.fth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,5 @@
+\ Version numbers of items included in the OLPC firmware image
+
+\ The overall firmware revision
+macro: FW_MAJOR A
+macro: FW_MINOR 02
Added: cpu/x86/pc/neptune/vsapci.fth
===================================================================
--- cpu/x86/pc/neptune/vsapci.fth (rev 0)
+++ cpu/x86/pc/neptune/vsapci.fth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,210 @@
+\ See license at end of file
+purpose: Simulates PCI configuration headers for Geode on-chip devices
+
+\ This modifies OFW's PCI configuration access routines so that some Geode
+\ on-chip devices appear to have PCI configuration headers, although they
+\ don't really have hardware implementing same. This makes it possible
+\ to discard the elaborate VSA code, which simulates various bits of
+\ PC and PCI legacy hardware by trapping access to certain registers and
+\ running System Management Mode code to fake their semantics.
+\ The code here has the same general effect as the VSA code, but it is
+\ much simpler because it hooks in at an appropriate place in the software,
+\ instead of having to simulate the hardware register access semantics.
+
+\ see ~/OLPC/vsa/sysmgr/topology.c
+\ see ~/OLPC/vsa/sysmgr/pci_pm.c
+
+\ 0: vendor 2: device 4: command 6: status
+\ 8.1: rev 9.3: class c: /cache-line d: latency e: header f: BIST
+
+hex
+create nb-hdr \ All R/O except cmd/stat, cache line size, latency
+ fffffffc , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 ,
+
+ 28100b , 2200005 , 6000021 , 80f808 ,
+ ac1d , 0 , 0 , 0 , \ I/O BAR - base of virtual registers
+ 0 , 0 , 0 , 28100b ,
+ 0 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 ,
+
+create lxfb-hdr \ All R/O except cmd/stat and cache line size
+ ff800000 , ffffc000 , ffffc000 , ffffc000 ,
+ 0 , 0 , 0 , 0 ,
+
+ 30100b , 2200002 , 3000000 , 8 ,
+ fb-pci-base , gp-pci-base , dc-pci-base , vp-pci-base , \ FB, GP, DC, VP
+ 0 , 0 , 0 , 30100b , \ VIP (LX only)
+ 0 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 , \ Interrupt goes at 5c for LX
+ 3d0 , 3c0 , a0000 , 0 , \ VG IO, VG IO, EGA FB, MONO FB
+ 0 , 0 , 0 , 0 ,
+
+create isa-hdr
+ fffffff8 , ffffff00 , ffffffc0 , ffffffe0 ,
+ ffffff80 , ffffffc0 , 0 , 0 ,
+
+ 20901022 , 2a00049 , 6010003 , 802000 ,
+ 18b1 , 1001 , 1801 , 1881 , \ SMB-8 GPIO-256 MFGPT-64 IRQ-32
+ 1401 , 1841 , 0 , 20901022 , \ PMS-128 ACPI-64
+ 0 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , aa5b , \ interrupt steering
+ 0 , 0 , 0 , 0 ,
+
+create aes-hdr \ LX security block
+ ffffc000 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 ,
+
+ 20821022 , 2a00006 , 10100000 , 8 ,
+ aes-pci-base , 0 , 0 , 0 , \ BAR
+ 0 , 0 , 0 , 20821022 ,
+ 0 , 0 , 0 , 10e , \ INTA, IRQ 14
+ 0 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 ,
+
+0 [if] \ Turned off
+create nand-hdr \ Doesn't appear as a PCI device, and kernel doesn't care
+[then]
+
+create ide-hdr
+ 0 , 0 , 0 , 0 ,
+ fffffff0 , 0 , 0 , 0 , \ Maybe wrong
+
+ 209a1022 , 2a00041 , 1018001 , f800 ,
+ 0 , 0 , 0 , 0 ,
+ 18a1 , 0 , 0 , 209a1022 ,
+ 0 , 0 , 0 , 0 ,
+ 0 , 0 , a8a8a8a8 , ffff00ff ,
+ 3030303 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 ,
+
+create ac97-hdr
+ ffffff80 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 ,
+
+ 20931022 , 2a00041 , 4010001 , 0 ,
+ 1481 , 0 , 0 , 0 , \ I/O BAR-128
+ 0 , 0 , 0 , 20931022 ,
+ 0 , 0 , 0 , 205 , \ IntB , IRQ5
+ 0 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 ,
+
+create ohci-hdr
+ fffff000 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 ,
+
+ 20941022 , 2300006 , c031002 , 0 ,
+ ohci-pci-base , 0 , 0 , 0 , \ MEMBAR-1000
+ 0 , 0 , 0 , 20941022 ,
+ 0 , 40 , 0 , 40a , \ CapPtr INT-D, IRQ A
+ c8020001 , 0 , 0 , 0 , \ Capabilities - 40 is R/O, 44 is mask 8103 (power control)
+ 0 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 ,
+
+create ehci-hdr
+ fffff000 , 0 , 0 , 0 ,
+ 0 , 0 , 0 , 0 ,
+
+ 20951022 , 2300006 , c032002 , 0 ,
+ ehci-pci-base , 0 , 0 , 0 , \ MEMBAR-1000
+ 0 , 0 , 0 , 20951022 ,
+ 0 , 40 , 0 , 40a , \ CapPtr INT-D, IRQ A
+ c8020001 , 0 , 0 , 0 , \ Capabilities - 40 is R/O, 44 is mask 8103 (power control)
+\ 1 , 40080000 , 0 , 0 , \ EECP - see section 2.1.7 of EHCI spec
+ 01000001 , 00000000 , 0 , 0 , \ EECP - see section 2.1.7 of EHCI spec
+ 2020 , 0 , 0 , 0 , \ (EHCI page 8) 60 SBRN (R/O), 61 FLADJ (R/W), PORTWAKECAP
+
+create ff-loc -1 ,
+create 00-loc 0 ,
+
+variable hdr-offset
+variable bar-probing
+
+: do-special ( value adr -- )
+ drop ( value )
+ -1 = ( probing? )
+ hdr-offset @ h# 10 h# 2c within and bar-probing !
+ \ XXX need to decode EHCI power management stuff
+;
+
+: +hdr ( offset hdr-adr -- adr )
+ over hdr-offset ! ( offset hdr-adr ) \ Save for writing
+ bar-probing @ if ( offset hdr-adr )
+ h# 10 - + \ Index into bar sizes part
+ else
+ h# 20 + + \ Index into values part
+ then
+ bar-probing off
+;
+: geode-map ( adr -- data-adr )
+ dup h# f0 and h# 70 >= if drop 00-loc exit then ( adr )
+ dup h# 7f and swap h# ff00 and case ( offset )
+ h# 7800 of isa-hdr endof
+\ h# 7900 of nand-hdr endof
+ h# 7a00 of ide-hdr endof
+ h# 7b00 of ac97-hdr endof
+ h# 7c00 of ohci-hdr endof
+ h# 7d00 of ehci-hdr endof
+ h# 800 of nb-hdr endof
+ h# 900 of lxfb-hdr endof
+ h# a00 of aes-hdr endof
+ ( default ) 2drop ff-loc exit
+ endcase
+ +hdr
+;
+
+\ The standard cf8/cfc dance
+: config-map-m1 ( config-adr -- port )
+ dup 3 invert and h# 8000.0000 or h# cf8 pl! ( config-adr )
+ 3 and h# cfc or io-base +
+;
+
+: virtual-pci-slot? ( config-adr -- flag )
+ d# 11 rshift h# 1fff and dup h# f = swap 1 = or
+;
+
+: preassigned-pci-slot? ( config-adr -- flag )
+ drop true
+;
+
+: config-setup ( a1 -- a2 special? )
+ dup virtual-pci-slot? ( a1 special )
+ if geode-map true else config-map-m1 false then
+;
+
+: config-b@ ( a -- b ) config-setup drop rb@ ;
+: config-w@ ( a -- w ) config-setup drop rw@ ;
+: config-l@ ( a -- l ) config-setup drop rl@ ;
+
+: config-b! ( b a -- ) config-setup if do-special else rb! then ;
+: config-w! ( w a -- ) config-setup if do-special else rw! then ;
+: config-l! ( l a -- ) config-setup if do-special else rl! then ;
+
+\ LICENSE_BEGIN
+\ Copyright (c) 2006 FirmWorks
+\
+\ Permission is hereby granted, free of charge, to any person obtaining
+\ a copy of this software and associated documentation files (the
+\ "Software"), to deal in the Software without restriction, including
+\ without limitation the rights to use, copy, modify, merge, publish,
+\ distribute, sublicense, and/or sell copies of the Software, and to
+\ permit persons to whom the Software is furnished to do so, subject to
+\ the following conditions:
+\
+\ The above copyright notice and this permission notice shall be
+\ included in all copies or substantial portions of the Software.
+\
+\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+\
+\ LICENSE_END
Added: dev/dnet/dnet.bth
===================================================================
--- dev/dnet/dnet.bth (rev 0)
+++ dev/dnet/dnet.bth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,14 @@
+purpose: Load file for Lattice Ethernet interface (dnet)
+
+command: &tokenize &this
+build-now
+
+silent on
+
+begin-tokenizing dnet.fc
+
+FCode-version2
+fload ${BP}/dev/dnet/dnet.fth
+end0
+
+end-tokenizing
Added: dev/dnet/dnet.fth
===================================================================
--- dev/dnet/dnet.fth (rev 0)
+++ dev/dnet/dnet.fth 2008-08-06 07:06:30 UTC (rev 870)
@@ -0,0 +1,348 @@
+purpose: Ethenet Driver for Lattice Ethernet device (dnet)
+\ See license at end of file
+
+hex
+headers
+
+: copyright ( -- )
+ ." Copyright (c) 2008 Dave Srl. All Rights Reserved." cr
+;
+
+\ Register offsets from the adapter’s base address
+
+\ TODO remove the following
+0 constant control \ 1 byte W/O - writing one bits causes things to happen
+2 constant unicast-addr \ 6 bytes R/W - Ethernet address for reception
+8 constant xmit-status \ 1 byte - 0 => busy 1 => okay else => error
+9 constant xmit-fifo \ 1 byte - write repetitively to setup packet
+a constant xmit-len \ 16 bits - length of packet to send
+c constant rcv-rdy \ 1 byte - count of waiting packets
+d constant rcv-fifo \ 1 byte - read repetitively to remove first packet
+e constant rcv-len \ 16 bits
+10 constant local-addr \ 6 bytes R/O - Factory-assigned Ethernet address
+\ until here
+
+
+\ dnet register definition
+
+0 constant rx-len-fifo
+4 constant rx-data-fifo
+8 constant tx-len-fifo
+c constant rx-data-fifo
+
+100 constant verid
+104 constant intr-src
+108 constant intr-enb
+10c constant rx-status
+110 constant tx-status
+114 constant rx-frames-cnt
+118 constant tx-frames-cnt
+11c constant rx-fifo-th
+120 constant tx-fifo-th
+124 constant sys-ctl
+128 constant pause-tmr
+
+200 constant macreg-data
+204 constant macreg-addr
+1 d# 31 << constant macreg-write
+
+\ TODO: dnet rx & tx statistics counter registers
+
+
+\ macreg register definition
+0 constant macreg-mode
+2 constant macreg-rxtx-mode
+4 constant macreg-max_pkt_size
+8 constant macreg-igp
+a constant macreg-mac_addr_0
+c constant macreg-mac_addr_1
+e constant macreg-mac_addr_2
+12 constant macreg-tx_rx_sts
+14 constant macreg-gmii_mng_ctl
+16 constant macreg-gmii_mng_dat
+
+100000 constant /regs \ Total size of adapter’s register bank
+10000000 constant /real-regs \ Total size of adapter’s register bank
+
+: map-in ( addr space size -- virt ) " map-in" $call-parent ;
+
+: map-out ( virt size -- ) " map-out" $call-parent ;
+
+: my-w@ ( offset -- w ) my-space + " config-w@" $call-parent ;
+: my-w! ( w offset -- ) my-space + " config-w!" $call-parent ;
+
+" ethernet" device-name
+" Lattice,tri-speed-eth" encode-string " compatible" property
+" network" device-type
+
+\ Some of Apple’s Open Firmware implementations have a bug in their map-in method. The
+\ bug causes phys.lo and phys.mid to be treated as absolute addresses rather than
+\ offsets even when working with relocatable addresses.
+\ To overcome this bug, the Open Firmware Working Group in conjunction with Apple has
+\ adopted a workaround that is keyed to the presence or absence of the add-range method
+\ in the PCI node. If the add-range method is present in an Apple ROM, the map-in
+\ method is broken. If the add-range property is absent, the map-in method behaves
+\ correctly.
+\ The following methods allow the FCode driver to accomodate both broken and working
+\ map-in methods.
+: map-in-broken? ( -- flag )
+ \ Look for the method that is present when the bug is present
+ " add-range" my-parent ihandle>phandle ( adr len phandle )
+ find-method dup if nip then ( flag ) \ Discard xt if present
+;
+
+\ Return phys.lo and phys.mid of the address assigned to the PCI base address
+\ register indicated by phys.hi .
+: get-base-address ( phys.hi -- phys.lo phys.mid phys.hi )
+ " assigned-addresses" get-my-property if ( phys.hi )
+ ." No address property found!" cr
+ 0 0 rot exit \ Error exit
+ then ( phys.hi adr len )
+ rot >r ( adr len ) ( r: phys.hi )
+ \ Found assigned-addresses, get address
+ begin dup while ( adr len' ) \ Loop over entries
+ decode-phys ( adr len' phys.lo phys.mid phys.hi )
+ h# ff and r@ h# ff and = if ( adr len' phys.lo phys.mid ) \ This one?
+ 2swap 2drop ( phys.lo phys.mid ) \ This is the one
+ r> exit ( phys.lo phys.mid phys.hi )
+ else ( adr len’ phys.lo phys.mid ) \ Not this one
+ 2drop ( adr len’ )
+ then ( adr len’ )
+ decode-int drop decode-int drop \ Discard boring fields
+ repeat
+ 2drop ( )
+ ." Base address not assigned!" cr
+ 0 0 r> ( 0 0 phys.hi )
+;
+
+\ String comparision
+: $= ( adr0 len0 adr1 len1 -- equal? )
+ 2 pick <> if 3drop false exit then ( adr0 len0 adr1 )
+ swap comp 0=
+;
+
+\ Define "reg" property
+\ PCI Configuration Space
+my-address my-space encode-phys 0 encode-int encode+ 0 encode-int encode+
+
+\ Memory Space Base Address Register 10
+my-address my-space 0200.0010 or encode-phys encode+
+0 encode-int encode+ /regs encode-int encode+
+
+\ Memory Space Base Address Register 14
+my-address my-space 0200.0014 or encode-phys encode+
+0 encode-int encode+ /real-regs encode-int encode+
+
+\ PCI Expansion ROM
+my-address my-space h# 200.0030 or encode-phys encode+
+0 encode-int encode+ h# 10.0000 encode-int encode+
+" reg" property
+
+-1 instance value chipbase
+-1 instance value real-chipbase
+
+: map-regs ( -- )
+ map-in-broken? if
+ my-space h# 8200.0010 or get-base-address ( phys.lo phys.mid phys.hi )
+ else
+ my-address my-space h# 200.0010 or ( phys.lo phys.mid phys.hi )
+ then ( phys.lo phys.mid phys.hi )
+
+ /regs map-in to chipbase
+ 4 dup my-w@ 2 or swap my-w! \ Enable memory space
+ chipbase encode-int " address" property
+
+ map-in-broken? if
+ my-space h# 8200.0010 or get-base-address ( phys.lo phys.mid phys.hi )
+ else
+ my-address my-space h# 200.0014 or ( phys.lo phys.mid phys.hi )
+ then ( phys.lo phys.mid phys.hi )
+
+ /real-regs map-in to real-chipbase
+ real-chipbase encode-int " real-address" property
+
+;
+
+: unmap-regs ( -- )
+ 4 dup my-w@ 4 invert and swap my-w! \ Disable memory space
+ chipbase /regs map-out -1 to chipbase
+ real-chipbase /real-regs map-out -1 to chipbase
+ " address" delete-property
+;
+
+: e@ ( register -- byte ) real-chipbase 4000000 + + rb@ ;
+: e! ( byte register -- ) real-chipbase 4000000 + + rb! ;
+: ew@ ( register -- 16-bits ) real-chipbase 4000000 + + rw@ ;
+: ew! ( 16-bits register -- ) real-chipbase 4000000 + + rw! ;
+: el@ ( register -- 16-bits ) real-chipbase 4000000 + + rl@ ;
+: el! ( 16-bits register -- ) real-chipbase 4000000 + + rl! ;
+
+: mac@ ( register -- 16-bits)
+ \ write address to address register
+ macreg-addr el!
+ \ read data register
+ macreg-data el@
+;
+
+: mac! ( 16-bits register -- 16-bits )
+ \ write data to data register
+ swap macreg-data el!
+ \ write address to address register
+ macreg-write or macreg-addr el!
+
+;
+
+: control-on ( control-bit -- ) control e@ or control e! ;
+: control-off ( control-bit -- ) invert control e@ and control e! ;
+
+: reset-chip ( -- ) 1 control e! ;
+: receive-on ( -- ) 2 control-on ;
+: return-buffer ( -- ) 4 control-on ;
+: start-xmit ( -- ) 8 control-on ;
+: promiscuous ( -- ) 10 control-on ;
+: loopback-on ( -- ) 20 control-on ;
+: loopback-off ( -- ) 20 control-off ;
+
+: receive-ready? ( -- #pkts-waiting ) rcv-rdy e@ ;
+: wait-for-packet ( -- ) begin key? receive-ready? or until ;
+
+\ Create local-mac-address property from the information in the chip
+map-regs
+6 alloc-mem ( mem-addr )
+6 0 do local-addr i + rb@ over i + c! loop ( mem-addr )
+6 2dup encode-string " local-mac-address" property ( mem-addr 6 )
+free-mem
+unmap-regs
+
+: initchip ( -- )
+ reset-chip
+ \ Ask the host system for the station address and give it to the adapter
+ mac-address 0 do ( addr )
+ dup i + c@ unicast-addr i + e! ( addr )
+ loop drop
+ receive-on \ Enable reception
+;
+
+: net-init ( -- succeeded? )
+ \ loopback-on loopback-test loopback-off if init-chip true else false then
+ true
+;
+
+\ Check for incoming Ethernet packets while using promiscuous mode.
+: watch-test ( -- )
+ ." Looking for Ethernet packets." cr
+ ." ’.’ is a good packet. ’X’ is a bad packet." cr
+ ." Press any key to stop." cr
+ begin
+ wait-for-packet
+ receive-ready? if
+ rcv-len ew@ 8000 and 0= if ." ." else ." X" then
+ return-buffer
+ then
+ key? dup if key drop then
+ until
+;
+
+: (watch-net) ( -- )
+ map-regs
+ promiscuous
+ net-init if watch-test reset-chip then
+ unmap-regs
+;
+
+: le-selftest ( -- passed? )
+ net-init
+ \ dup if net-off then
+;
+
+external
+: read ( addr requested-len -- actual-len )
+ \ Exit if packet not yet available
+ receive-ready? 0= if 2drop -2 exit then
+ rcv-len ew@ dup 8000 and = if ( addr requested-len packet-len )
+ 3drop return-buffer \ Discard bad packet
+ -1 exit
+ then ( addr requested-len packet-len )
+
+ \ Truncate to fit into the supplied buffer
+ min ( addr actual-len )
+
+ \ Note: For a DMA-based adapter, the driver would have to synchronize caches (e.g.
+ \ with "dma-sync") and copy the packet from the DMA buffer into the result buffer.
+
+ tuck bounds ?do rcv-fifo e@ i c! loop ( actual-len )
+ return-buffer ( actual-len )
+;
+
+: close ( -- ) reset-chip unmap-regs ;
+
+: open ( -- ok? )
+ map-regs
+ mac-address encode-string " mac-address" property
+ \ initchip
+ \ my-args " promiscuous" $= if promiscuous then
+
+ \ Note: For a DMA-based adapter, the driver would have to allocate DMA memory for
+ \ packet buffers, construct buffer descriptor data structures, and possibly
+ \ synchronize caches (e.g. with "dma-sync").
+ true
+;
+
+: write ( addr len -- actual )
+ begin xmit-status e@ 0<> until
+ \ Note: For a DMA-based adapter, the driver would have to copy the
+ \ packet into the DMA buffer and synchronize caches (e.g. with "dma-sync").
+ \ Copy packet into chip
+ tuck bounds ?do i c@ xmit-fifo e! loop
+ \ Set length register
+ dup h# 64 max xmit-len ew!
+ start-xmit
+;
+
+: load ( addr -- len )
+ " obp-tftp" find-package if ( addr phandle )
+ my-args rot open-package ( addr ihandle|0 )
+ else ( addr )
+ 0 ( addr 0 )
+ then ( addr ihandle|0 )
+ dup 0= abort" Can’t open obp-tftp support package" ( addr ihandle )
+
+ >r
+ " load" r@ $call-method ( len )
+ r> close-package
+;
+
+: selftest ( -- failed? )
+ map-regs
+ le-selftest 0=
+ unmap-regs
+;
+
+: watch-net ( -- )
+ selftest 0= if (watch-net) then
+;
+fcode-end
+
+\ LICENSE_BEGIN
+\ Copyright (c) 2008 Dave Srl
+\
+\ Permission is hereby granted, free of charge, to any person obtaining
+\ a copy of this software and associated documentation files (the
+\ "Software"), to deal in the Software without restriction, including
+\ without limitation the rights to use, copy, modify, merge, publish,
+\ distribute, sublicense, and/or sell copies of the Software, and to
+\ permit persons to whom the Software is furnished to do so, subject to
+\ the following conditions:
+\
+\ The above copyright notice and this permission notice shall be
+\ included in all copies or substantial portions of the Software.
+\
+\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+\
+\ LICENSE_END
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