[OpenBIOS] [PATCH 1/2] 40p: update interrupt routing code to match QEMU

[Mark Cave-Ayland]

On 01/10/2018 20:20, Hervé Poussineau wrote:

> Le 01/10/2018 à 19:55, Mark Cave-Ayland a écrit :
>> Note that whilst guest OSs should be relying on residual data rather than the
>> OF device tree to determine the hardware, we still update the interrupt
>> properties to match the new code in QEMU for consistency.
>>
>> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland at ilande.co.uk>
>> ---
>>   arch/ppc/qemu/init.c |  2 +-
>>   drivers/pci.c        | 24 ++++++++++++++++++++----
>>   2 files changed, 21 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/ppc/qemu/init.c b/arch/ppc/qemu/init.c
>> index 759f7ac..f72728c 100644
>> --- a/arch/ppc/qemu/init.c
>> +++ b/arch/ppc/qemu/init.c
>> @@ -130,7 +130,7 @@ static const pci_arch_t known_arch[] = {
>>               { .type = MEMORY_SPACE_32, .parentaddr = 0, .childaddr = 0xc0100000,
>> .len = 0x10000000 },
>>               { .type = 0, .parentaddr = 0, .childaddr = 0, .len = 0 }
>>            },
>> -        .irqs = { 9, 11, 9, 11 }
>> +        .irqs = { 15, 15, 15, 15 }
>>       },
>>       [ARCH_MAC99] = {
>>           .name = "MAC99",
>> diff --git a/drivers/pci.c b/drivers/pci.c
>> index 8f97ae1..92fd4af 100644
>> --- a/drivers/pci.c
>> +++ b/drivers/pci.c
>> @@ -1986,10 +1986,26 @@ static phandle_t ob_pci_host_set_interrupt_map(phandle_t host)
>>   static void ob_pci_host_bus_interrupt(ucell dnode, u32 *props, int *ncells, u32
>> addr, u32 intno)
>>   {
>>       *ncells += pci_encode_phys_addr(props + *ncells, 0, 0, addr, 0, 0);
>> -    props[(*ncells)++] = intno;
>> -    props[(*ncells)++] = dnode;
>> -    props[(*ncells)++] = arch->irqs[((intno - 1) + (addr >> 11)) & 3];
>> -    props[(*ncells)++] = 1;
>> +
>> +    if (is_oldworld() || is_newworld()) {
>> +        /* Mac machines */
>> +        props[(*ncells)++] = intno;
>> +        props[(*ncells)++] = dnode;
>> +        props[(*ncells)++] = arch->irqs[((intno - 1) + (addr >> 11)) & 3];
>> +        props[(*ncells)++] = 1;
>> +    } else {
>> +        /* PReP machines */
>> +        props[(*ncells)++] = intno;
>> +        props[(*ncells)++] = dnode;
>> +
>> +        if (PCI_DEV(addr) == 1 && PCI_FN(addr) == 0) {
>> +            /* LSI SCSI has fixed routing to IRQ 13 */
>> +            props[(*ncells)++] = 13;
>> +        } else {
>> +            props[(*ncells)++] = arch->irqs[((intno - 1) + (addr >> 11)) & 1];
> 
> In that case, arch.irqs = { 15, 15, 15, 15 }.
> Why doing a "& 1", instead of doing arch->irqs[0], or hard-coding 15?

Mainly for consistency so it matches the same algorithm in raven_map_irq() - see
https://git.qemu.org/?p=qemu.git;a=blob;f=hw/pci-host/prep.c;h=b1b6b16badb38ff35e4c50f358fdc6aab08f5b51;hb=a2ef4d9e95400cd387ab4ae19a317741e458fb07#l193

I was under the impression that this was how it was modelled on real hardware,
although I don't personally have any documentation to support this.


ATB,

Mark.