[OpenBIOS] L2 Cache Settings

[Programmingkid]

> On Jan 23, 2018, at 4:57 PM, Segher Boessenkool <segher at kernel.crashing.org> wrote:
> 
> On Mon, Jan 22, 2018 at 10:35:17PM -0500, Programmingkid wrote:
>>> On Jan 22, 2018, at 9:50 PM, James Lyons via OpenBIOS <openbios at openbios.org> wrote:
>>> 
>>> Looks like for the 7447a we set SPR 1017( L2CR ) bit 0 ( L2E ) or just write 0x8000000 to the reg.
>>> 
>>> Not sure how we do this in Openbios.
>> 
>> This would be done in PowerPC assembly. A C function can contain the inline assembly code. 
>> 
>> It would look something like this:
>> 
>> void setup_PPC_7447a(void)
>> {
>>    asm volatile("addis r10, 0, 0x8000");
>>    asm volatile("mtspr 1017, r10");
>> }
> 
> That is incorrect asm.  You cannot use r10, it can already be in use,
> and you cannot pass a reg between two separate asm statements like this.
> 
> You meant something like
> 
> void enable_L2_7447A(void)
> {
> 	asm("mtspr %0,%1" : : "n"(1017), "r"(0x80000000));
> }

I would change "asm" to "asm volatile" to prevent the compiler from optimizing this code out.