[OpenBIOS] [PATCH] SPARC64: fix endian naming of architecture in_*() and out_*() functions
Mark Cave-Ayland
mark.cave-ayland at ilande.co.uk
Sun Aug 26 16:45:25 CEST 2018
For reasons lost in the history of time, the SPARC64 endian accessors were
given the opposite names to their function i.e. out_le32() would use a
standard load whilst out_be32() would use a little-endian load. Switch
them around so that their implementation matches their name (and also that
of all other architectures).
Note that since the references in the inb/inw/inl and outb/outw/outl wrappers
are also swapped around then these accessors for legacy ioports (i.e. little
endian) will still behave exactly the same as before.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland at ilande.co.uk>
---
include/arch/sparc64/io.h | 33 ++++++++++++++++-----------------
include/arch/sparc64/pci.h | 8 ++++----
2 files changed, 20 insertions(+), 21 deletions(-)
diff --git a/include/arch/sparc64/io.h b/include/arch/sparc64/io.h
index 0f1a732..2812793 100644
--- a/include/arch/sparc64/io.h
+++ b/include/arch/sparc64/io.h
@@ -30,14 +30,13 @@ extern unsigned long isa_io_base;
#define inb(port) in_8((uint8_t *)((port)+isa_io_base))
#define outb(val, port) out_8((uint8_t *)((port)+isa_io_base), (val))
-#define inw(port) in_be16((uint16_t *)((port)+isa_io_base))
-#define outw(val, port) out_be16((uint16_t *)((port)+isa_io_base), (val))
-#define inl(port) in_be32((uint32_t *)((port)+isa_io_base))
-#define outl(val, port) out_be32((uint32_t *)((port)+isa_io_base), (val))
+#define inw(port) in_le16((uint16_t *)((port)+isa_io_base))
+#define outw(val, port) out_le16((uint16_t *)((port)+isa_io_base), (val))
+#define inl(port) in_le32((uint32_t *)((port)+isa_io_base))
+#define outl(val, port) out_le32((uint32_t *)((port)+isa_io_base), (val))
/*
* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
- * On Sparc64, BE versions must swap bytes using LE access ASI.
*/
static inline int in_8(volatile unsigned char *addr)
{
@@ -59,7 +58,7 @@ static inline void out_8(volatile unsigned char *addr, int val)
: "memory");
}
-static inline int in_le16(volatile unsigned short *addr)
+static inline int in_be16(volatile unsigned short *addr)
{
int ret;
@@ -71,7 +70,7 @@ static inline int in_le16(volatile unsigned short *addr)
return ret;
}
-static inline int in_be16(volatile unsigned short *addr)
+static inline int in_le16(volatile unsigned short *addr)
{
int ret;
@@ -83,7 +82,7 @@ static inline int in_be16(volatile unsigned short *addr)
return ret;
}
-static inline void out_le16(volatile unsigned short *addr, int val)
+static inline void out_be16(volatile unsigned short *addr, int val)
{
__asm__ __volatile__("stha %0, [%1] %2\n\t"
@@ -92,7 +91,7 @@ static inline void out_le16(volatile unsigned short *addr, int val)
: "memory");
}
-static inline void out_be16(volatile unsigned short *addr, int val)
+static inline void out_le16(volatile unsigned short *addr, int val)
{
__asm__ __volatile__("stha %0, [%1] %2\n\t"
:
@@ -100,7 +99,7 @@ static inline void out_be16(volatile unsigned short *addr, int val)
: "memory");
}
-static inline unsigned in_le32(volatile unsigned *addr)
+static inline unsigned in_be32(volatile unsigned *addr)
{
unsigned ret;
@@ -112,7 +111,7 @@ static inline unsigned in_le32(volatile unsigned *addr)
return ret;
}
-static inline unsigned in_be32(volatile unsigned *addr)
+static inline unsigned in_le32(volatile unsigned *addr)
{
unsigned ret;
@@ -123,7 +122,7 @@ static inline unsigned in_be32(volatile unsigned *addr)
return ret;
}
-static inline void out_le32(volatile unsigned *addr, int val)
+static inline void out_be32(volatile unsigned *addr, int val)
{
__asm__ __volatile__("stwa %0, [%1] %2\n\t"
:
@@ -131,7 +130,7 @@ static inline void out_le32(volatile unsigned *addr, int val)
: "memory");
}
-static inline void out_be32(volatile unsigned *addr, int val)
+static inline void out_le32(volatile unsigned *addr, int val)
{
__asm__ __volatile__("stwa %0, [%1] %2\n\t"
:
@@ -144,7 +143,7 @@ static inline void _insw_ns(volatile uint16_t * port, void *buf, int ns)
uint16_t *b = (uint16_t *) buf;
while (ns > 0) {
- *b++ = in_le16(port);
+ *b++ = in_be16(port);
ns--;
}
}
@@ -155,7 +154,7 @@ static inline void _outsw_ns(volatile uint16_t * port, const void *buf,
uint16_t *b = (uint16_t *) buf;
while (ns > 0) {
- out_le16(port, *b++);
+ out_be16(port, *b++);
ns--;
}
}
@@ -165,7 +164,7 @@ static inline void _insw(volatile uint16_t * port, void *buf, int ns)
uint16_t *b = (uint16_t *) buf;
while (ns > 0) {
- *b++ = in_be16(port);
+ *b++ = in_le16(port);
ns--;
}
}
@@ -176,7 +175,7 @@ static inline void _outsw(volatile uint16_t * port, const void *buf,
uint16_t *b = (uint16_t *) buf;
while (ns > 0) {
- out_be16(port, *b++);
+ out_le16(port, *b++);
ns--;
}
}
diff --git a/include/arch/sparc64/pci.h b/include/arch/sparc64/pci.h
index c7509af..2389a5d 100644
--- a/include/arch/sparc64/pci.h
+++ b/include/arch/sparc64/pci.h
@@ -35,14 +35,14 @@ static inline uint8_t pci_config_read8(pci_addr dev, uint8_t reg)
static inline uint16_t pci_config_read16(pci_addr dev, uint8_t reg)
{
uint16_t res;
- res = in_be16((uint16_t *)(PCI_CONFIG(dev) + reg));
+ res = in_le16((uint16_t *)(PCI_CONFIG(dev) + reg));
return res;
}
static inline uint32_t pci_config_read32(pci_addr dev, uint8_t reg)
{
uint32_t res;
- res = in_be32((uint32_t *)(PCI_CONFIG(dev) + reg));
+ res = in_le32((uint32_t *)(PCI_CONFIG(dev) + reg));
return res;
}
@@ -53,12 +53,12 @@ static inline void pci_config_write8(pci_addr dev, uint8_t reg, uint8_t val)
static inline void pci_config_write16(pci_addr dev, uint8_t reg, uint16_t val)
{
- out_be16((uint16_t *)(PCI_CONFIG(dev) + reg), val);
+ out_le16((uint16_t *)(PCI_CONFIG(dev) + reg), val);
}
static inline void pci_config_write32(pci_addr dev, uint8_t reg, uint32_t val)
{
- out_be32((uint32_t *)(PCI_CONFIG(dev) + reg), val);
+ out_le32((uint32_t *)(PCI_CONFIG(dev) + reg), val);
}
#else /* !PCI_CONFIG_1 */
#error PCI Configuration Mechanism is not specified or implemented
--
2.11.0
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