[OpenBIOS] [PATCH 0/8] pci: fix up PCI bridges

[Mark Cave-Ayland]

In order to progress further with sun4u in QEMU, it has become necessary
to introduce PCI bridges similar to a real Ultra 5. This is because several
OSs make assumptions about the PCI topology, and without the PCI bridge in
place will either crash or fail to map memory regions correctly.

This first patchset fixes up PCI bridges so that we can now enumerate them
correctly. As an idea as to where I'm going with this, if you also take the
WIP QEMU branch at https://github.com/mcayland/qemu/tree/sparc64-pcibridge
then the output of show-devs looks like this:


Welcome to OpenBIOS v1.1 built on Jun 11 2017 06:57
  Type 'help' for detailed information

0 > show-devs 
ffe1bf40 /
ffe1c118 /aliases
ffe1c240 /openprom (BootROM)
ffe26b58 /openprom/client-services
ffe1c4f8 /options
ffe1c5d8 /chosen
ffe1c718 /builtin
ffe1c840 /builtin/console
ffe26620 /packages
ffe28648 /packages/cmdline
ffe28898 /packages/disk-label
ffe2c8e0 /packages/deblocker
ffe2cef8 /packages/grubfs-files
ffe2d308 /packages/sun-parts
ffe2d720 /packages/elf-loader
ffe2b218 /memory at 0,0 (memory)
ffe2b378 /virtual-memory
ffe2d880 /pci at 1fe,0 (pci)
ffe2e1b0 /pci at 1fe,0/pci at 1 (pci)
ffe2e8c8 /pci at 1fe,0/pci at 1,1 (pci)
ffe2efb0 /pci at 1fe,0/pci at 1,1/ebus at 1
ffe2f7f0 /pci at 1fe,0/pci at 1,1/ebus at 1/eeprom at 0
ffe2f968 /pci at 1fe,0/pci at 1,1/ebus at 1/fdthree at 0 (block)
ffe2feb8 /pci at 1fe,0/pci at 1,1/ebus at 1/su at 0 (serial)
ffe30248 /pci at 1fe,0/pci at 1,1/ebus at 1/kb_ps2 at 0 (serial)
ffe305b8 /pci at 1fe,0/pci at 1,1/QEMU,VGA at 2 (display)
ffe31c30 /pci at 1fe,0/pci at 1,1/pci-ata at 3 (pci-ide)
ffe32188 /pci at 1fe,0/pci at 1,1/pci-ata at 3/ide0 at 4000 (ide)
ffe32468 /pci at 1fe,0/pci at 1,1/pci-ata at 3/ide1 at 4100 (ide)
ffe32700 /pci at 1fe,0/pci at 1,1/pci-ata at 3/ide1 at 4100/cdrom at 0 (block)
ffe32d88 /pci at 1fe,0/NE2000 at 2 (network)
ffe33490 /SUNW,UltraSPARC-IIi (cpu)
 ok


Note I have several more SPARC64-related fixes queued, however as this
patchset is starting to get quite unwieldy it makes sense to split this
part off separately.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland at ilande.co.uk>

Mark Cave-Ayland (8):
  pci: add temporary bus-range property to PCI bridge devices
  pci: include PCI bus id in ob_pci_decode_unit()
  pci: create new ob_pci_bridge_node based upon ob_pci_bus_node
  pci: rename ob_pci_map_in() to ob_pci_bus_map_in()
  pci: implement ob_pci_bridge_map_in() for PCI-PCI bridge nodes
  pci: configure base and limit registers during PCI bridge
    configuration
  pci: split PCI bus interrupt maps from PCI host bridge interrupt maps
  pci: allow ob_pci_bus_set_interrupt_map() to take a callback function

 drivers/pci.c |  186 ++++++++++++++++++++++++++++++++++++++++++++-------------
 drivers/pci.h |    5 ++
 2 files changed, 150 insertions(+), 41 deletions(-)

-- 
1.7.10.4