[OpenBIOS] [PATCH 4/5] pci: update pci_set_host_ranges() to use the new pci_arch_t host_ranges

[Mark Cave-Ayland]

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland at ilande.co.uk>
---
 arch/sparc64/openbios.c |    2 +-
 drivers/pci.c           |   49 ++++++++++++++++-------------------------------
 2 files changed, 17 insertions(+), 34 deletions(-)

diff --git a/arch/sparc64/openbios.c b/arch/sparc64/openbios.c
index 20673bc..ef1fdae 100644
--- a/arch/sparc64/openbios.c
+++ b/arch/sparc64/openbios.c
@@ -67,7 +67,7 @@ static const struct hwdef hwdefs[] = {
             .host_ranges = {
                 { .type = CONFIGURATION_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x1000000ULL, .len = 0x2000000 },
                 { .type = IO_SPACE, .parentaddr = 0, .childaddr = APB_SPECIAL_BASE + 0x2000000ULL, .len = 0x10000 },
-                { .type = MEMORY_SPACE_32, .parentaddr = 0, .childaddr = APB_MEM_BASE + 0x100000ULL, .len = 0x10000000 },
+                { .type = MEMORY_SPACE_32, .parentaddr = 0x100000, .childaddr = APB_MEM_BASE + 0x100000ULL, .len = 0x10000000 },
                 { .type = 0, .parentaddr = 0, .childaddr = 0, .len = 0 }
             },
             .irqs = { 0, 1, 2, 3 },
diff --git a/drivers/pci.c b/drivers/pci.c
index 432ef71..27fb5f0 100644
--- a/drivers/pci.c
+++ b/drivers/pci.c
@@ -470,41 +470,24 @@ static void pci_host_set_ranges(const pci_config_t *config)
 {
 	phandle_t dev = get_cur_dev();
 	u32 props[32];
-	int ncells;
-
-	ncells = 0;
+	int ncells = 0;
+	pci_range_t range;
+	int i;
 	
-#ifdef CONFIG_SPARC64
-        /* While configuration space isn't mentioned in the IEEE-1275 PCI
-           bindings, it appears in the PCI host bridge ranges property in
-           real device trees. Hence we disable this range for all host
-           bridges except for SPARC, particularly as it causes Darwin/OS X
-           to incorrectly calculated PCI memory space ranges on PPC. */
-	ncells += pci_encode_phys_addr(props + ncells, 0, CONFIGURATION_SPACE,
-                     0, 0, 0);
-        ncells += host_encode_phys_addr(props + ncells, arch->cfg_addr);
-        ncells += pci_encode_size(props + ncells, arch->cfg_len);
-#endif
-
-	if (arch->io_base) {
-	    ncells += pci_encode_phys_addr(props + ncells, 0, IO_SPACE,
-				     0, 0, 0);
-        ncells += host_encode_phys_addr(props + ncells, arch->io_base);
-        ncells += pci_encode_size(props + ncells, arch->io_len);
-	}
-	if (arch->rbase) {
-	    ncells += pci_encode_phys_addr(props + ncells, 0, MEMORY_SPACE_32,
-				     0, 0, 0);
-        ncells += host_encode_phys_addr(props + ncells, arch->rbase);
-        ncells += pci_encode_size(props + ncells, arch->rlen);
-	}
-	if (arch->pci_mem_base) {
-	    ncells += pci_encode_phys_addr(props + ncells, 0, MEMORY_SPACE_32,
-				     0, 0, arch->pci_mem_base);
-        ncells += host_encode_phys_addr(props + ncells, arch->host_pci_base +
-				     arch->pci_mem_base);
-	ncells += pci_encode_size(props + ncells, arch->mem_len);
+	for (i = 0; i < 4; i++) {
+		range = arch->host_ranges[i];
+	    
+		/* End of range list reached */
+		if (range.type == 0x0 && range.len == 0x0) {
+			break;
+		}
+	
+		ncells += pci_encode_phys_addr(props + ncells, 0, range.type,
+						0, 0, range.parentaddr);
+		ncells += host_encode_phys_addr(props + ncells, range.childaddr);
+		ncells += pci_encode_size(props + ncells, range.len);
 	}
+	
 	set_property(dev, "ranges", (char *)props, ncells * sizeof(props[0]));
 }
 
-- 
1.7.10.4