[OpenBIOS] [PATCH 5/5] pci: remove the configuration space range from the PCI host bridge by default

[Alexander Graf]

On 02.01.16 21:44, Mark Cave-Ayland wrote:
> While the configuration space range appears in real SPARC device trees, it
> isn't mentioned in the IEEE-1275 PCI bindings and in fact causes Darwin/OS X
> to calculate PCI address spaces incorrectly.
> 
> Disable this range in the PCI host bridge by default, except for SPARC64
> where it can evidently still appear.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland at ilande.co.uk>

This is an excerpt from a PowerMac3,1 device tree pci ranges node:

< 0x2000000 0x0 0xf5000000 0xf5000000 0x0 0x1000000
  0x1000000 0x0 0x0 0xf4000000 0x0 0x800000>;

So yes, only MMIO32 and PIO are set. Awesome ;).


Alex

> ---
>  openbios-devel/drivers/pci.c |   13 +++++++++----
>  1 file changed, 9 insertions(+), 4 deletions(-)
> 
> diff --git a/openbios-devel/drivers/pci.c b/openbios-devel/drivers/pci.c
> index 65f5fe9..5627c90 100644
> --- a/openbios-devel/drivers/pci.c
> +++ b/openbios-devel/drivers/pci.c
> @@ -457,13 +457,18 @@ static void pci_host_set_ranges(const pci_config_t *config)
>  	int ncells;
>  
>  	ncells = 0;
> -	/* first encode PCI configuration space */
> -	{
> -	    ncells += pci_encode_phys_addr(props + ncells, 0, CONFIGURATION_SPACE,
> +	
> +#ifdef CONFIG_SPARC64
> +        /* While configuration space isn't mentioned in the IEEE-1275 PCI
> +           bindings, it appears in the PCI host bridge ranges property in
> +           real device trees. Hence we disable this range for all host
> +           bridges except for SPARC, particularly as it causes Darwin/OS X
> +           to incorrectly calculated PCI memory space ranges on PPC. */
> +	ncells += pci_encode_phys_addr(props + ncells, 0, CONFIGURATION_SPACE,
>                       config->dev, 0, 0);
>          ncells += host_encode_phys_addr(props + ncells, arch->cfg_addr);
>          ncells += pci_encode_size(props + ncells, arch->cfg_len);
> -	}
> +#endif
>  
>  	if (arch->io_base) {
>  	    ncells += pci_encode_phys_addr(props + ncells, 0, IO_SPACE,
>