[OpenBIOS] SPARC64: Forth re-entrancy during MMU I/D TLB miss

[Mark Cave-Ayland]

Hi everyone,

So having a poke around various bits of documentation relating to 
implementing pgmap@, I've come to the realisation that since the Solaris 
kernel needs to install it's own va>tte-data implementation into 
OpenBIOS then it's going to be necessary to call back into Forth from 
the D/I-MMU miss traps.

I've been looking around the code in arch/sparc64/switch.S but it looks 
as if this code only swaps between 2 individual contexts - am I right in 
thinking there needs to be a way of specifying the memory address of the 
context for this code to be reusable during a trap? Or would a better 
way be to duplicate this file but with another static context used only 
for MMU miss traps?

Another question for PPC users: will pgmap@/pgmap! be required there 
too? I'm trying to figure out if this is something that needs to live 
within libopenbios/ofmem_common.c or whether it's just a SPARC-specific 
hack. It looks as if these words are also required for SPARC32 so I'm 
leaning towards the former...


ATB,

Mark.

-- 
Mark Cave-Ayland - Senior Technical Architect
PostgreSQL - PostGIS
Sirius Corporation plc - control through freedom
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