[OpenBIOS] Faulty Qemu SPARC64 IDE emulation?
Tarl.Neustaedter at Sun.COM
Tue Dec 22 20:20:59 CET 2009
Tarl Neustaedter wrote:
>> Right, I think I understand now. So the obvious question to ask now
>> is how is PCI configuration space mapped on Sparc64? I can see that
>> on x86 it's mapped to an I/O port at 0xCF8 but I can't seem to find
>> how this is implemented on Sparc64. Anyone have any idea?
> PCI spaces are each mapped in separately in physical spaces on SPARC.
On a sun4u system (Tazmo, SUNW,Ultra-4), the first PCI root complex is a
Psycho (Sun's first PCI bus chip) and has spaces at:
Config: 000001fe.01000000, length 00800000.
IO: 000001fe.02010000 length 00010000.
mem32: 000001ff.80000000 length 80000000.
mem64: 000001ff.80000000 length 80000000
This can be derived from the "Ranges" property in the PCI node, attached
below. Note that Psycho did not implement mem64 separately, so the mem64
space simply points to mem32 space. And it only has 31 bits of
addressability - I recall the other half of the mem32 space is used for
DMA, so thus not mappable as registers.
The config space is addressed precisely as defined by the PCI bindings
"phys.hi" definition. That means it's composed of:
phys.hi: xxxxxxxx bbbbbbbb dddddfff rrrrrrrr
Where xxxx is not part of the addressing in above address space,
bbbbbbbb is eight bits of bus number, ddddd is five bits of device
number, fff is three bits of function number and rrrrrrrr is eight bits
of register offset addressing (sorry I got it wrong on an earlier email,
I was thinking of some pci-e stuff).
- - - - -
PCI node as shown by Solaris "prtconf -pv":
compatible: 'pci108e,8000' + 'pciclass,060000'
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