[OpenBIOS] Faulty Qemu SPARC64 IDE emulation?

[Tarl Neustaedter]

[...]
>
> Right, I think I understand now. So the obvious question to ask now is 
> how is PCI configuration space mapped on Sparc64? I can see that on 
> x86 it's mapped to an I/O port at 0xCF8 but I can't seem to find how 
> this is implemented on Sparc64. Anyone have any idea?

PCI spaces are each mapped in separately in physical spaces on SPARC. On 
a Sun4u system, as I recall, the mappings are something like:

1fe.0000.0000-1fe.00ff.ffff : config-space (where it's bbddff, 
bus-device-function)
1fe.8000.0000-1fe.ffff.ffff: io space
1ff.0000.0000-1ff.ffff.ffff: 32-bit memory space

I'll get the exact addresses later on today. Also note there will be 
multiple such mappings, since we usually have multiple PCI roots.