[OpenBIOS] r270 - in openbios-devel: arch/ppc/qemu arch/sparc64 drivers include/openbios include/ppc include/sparc64
svn at openbios.org
svn at openbios.org
Sat Nov 29 14:18:32 CET 2008
Author: blueswirl
Date: 2008-11-29 14:18:32 +0100 (Sat, 29 Nov 2008)
New Revision: 270
Modified:
openbios-devel/arch/ppc/qemu/init.c
openbios-devel/arch/sparc64/openbios.c
openbios-devel/drivers/pci.c
openbios-devel/drivers/pci.h
openbios-devel/include/openbios/pci.h
openbios-devel/include/ppc/pci.h
openbios-devel/include/sparc64/pci.h
Log:
Use pci_arch_t also on Sparc64 (but disable PCI probing for now, hangs)
Modified: openbios-devel/arch/ppc/qemu/init.c
===================================================================
--- openbios-devel/arch/ppc/qemu/init.c 2008-11-29 13:10:17 UTC (rev 269)
+++ openbios-devel/arch/ppc/qemu/init.c 2008-11-29 13:18:32 UTC (rev 270)
@@ -61,7 +61,6 @@
0xfe000000, 0x00800000, 0xfd000000, 0x01000000,
},
};
-pci_arch_t *arch;
uint32_t isa_io_base;
void
Modified: openbios-devel/arch/sparc64/openbios.c
===================================================================
--- openbios-devel/arch/sparc64/openbios.c 2008-11-29 13:10:17 UTC (rev 269)
+++ openbios-devel/arch/sparc64/openbios.c 2008-11-29 13:18:32 UTC (rev 270)
@@ -16,6 +16,8 @@
#include "openbios/nvram.h"
#include "sys_info.h"
#include "openbios.h"
+#include "openbios/pci.h"
+#include "asm/pci.h"
#include "libc/byteorder.h"
#define cpu_to_be16(x) __cpu_to_be16(x)
#include "openbios/firmware_abi.h"
@@ -30,6 +32,10 @@
#define BIOS_CFG_CMD 0x510
#define BIOS_CFG_DATA 0x511
+#define APB_SPECIAL_BASE 0x1fe00000000ULL
+#define PCI_CONFIG (APB_SPECIAL_BASE + 0x1000000ULL)
+#define APB_MEM_BASE 0x1ff00000000ULL
+
static unsigned char intdict[256 * 1024];
// XXX
@@ -45,6 +51,26 @@
static uint8_t idprom[32];
+struct hwdef {
+ pci_arch_t pci;
+ uint8_t machine_id_low, machine_id_high;
+};
+
+static const struct hwdef hwdefs[] = {
+ {
+ .pci.cfg_addr = PCI_CONFIG,
+ .pci.cfg_data = 0,
+ .pci.cfg_base = 0x80000000ULL,
+ .pci.cfg_len = 0,
+ .pci.mem_base = 0,
+ .pci.mem_len = 0,
+ .pci.io_base = 0,
+ .pci.io_len = 0,
+ .machine_id_low = 0,
+ .machine_id_high = 255,
+ },
+};
+
struct cpudef {
unsigned long iu_version;
const char *name;
@@ -818,9 +844,26 @@
static void
arch_init( void )
{
+ unsigned int i;
+ uint8_t qemu_machine_type;
+ const struct hwdef *hwdef;
+
+ outw(__cpu_to_le16(FW_CFG_MACHINE_ID), BIOS_CFG_CMD);
+ qemu_machine_type = inb(BIOS_CFG_DATA);
+
+ for (i = 0; i < sizeof(hwdefs) / sizeof(struct hwdef); i++) {
+ if (hwdefs[i].machine_id_low <= qemu_machine_type &&
+ hwdefs[i].machine_id_high >= qemu_machine_type) {
+ hwdef = &hwdefs[i];
+ break;
+ }
+ }
+ if (!hwdef)
+ for(;;); // Internal inconsistency, hang
+
modules_init();
#ifdef CONFIG_DRIVER_PCI
- ob_pci_init();
+ //ob_pci_init();
#endif
#ifdef CONFIG_DRIVER_IDE
setup_timers();
Modified: openbios-devel/drivers/pci.c
===================================================================
--- openbios-devel/drivers/pci.c 2008-11-29 13:10:17 UTC (rev 269)
+++ openbios-devel/drivers/pci.c 2008-11-29 13:18:32 UTC (rev 270)
@@ -29,6 +29,8 @@
/* DECLARE data structures for the nodes. */
DECLARE_UNNAMED_NODE( ob_pci_node, INSTALL_OPEN, 2*sizeof(int) );
+pci_arch_t *arch;
+
static void
ob_pci_open(int *idx)
{
Modified: openbios-devel/drivers/pci.h
===================================================================
--- openbios-devel/drivers/pci.h 2008-11-29 13:10:17 UTC (rev 269)
+++ openbios-devel/drivers/pci.h 2008-11-29 13:18:32 UTC (rev 270)
@@ -54,8 +54,6 @@
#define PCI_MIN_GNT 0x3e /* 8 bits */
#define PCI_MAX_LAT 0x3f /* 8 bits */
-typedef uint32_t pci_addr;
-
typedef struct {
u16 signature;
u8 reserved[0x16];
Modified: openbios-devel/include/openbios/pci.h
===================================================================
--- openbios-devel/include/openbios/pci.h 2008-11-29 13:10:17 UTC (rev 269)
+++ openbios-devel/include/openbios/pci.h 2008-11-29 13:18:32 UTC (rev 270)
@@ -1,22 +1,26 @@
#ifndef _H_PCI
#define _H_PCI
+typedef uint32_t pci_addr;
+
typedef struct pci_arch_t pci_arch_t;
struct pci_arch_t {
- char * name;
- uint16_t vendor_id;
- uint16_t device_id;
- uint32_t cfg_addr;
- uint32_t cfg_data;
- uint32_t cfg_base;
- uint32_t cfg_len;
- uint32_t mem_base;
- uint32_t mem_len;
- uint32_t io_base;
- uint32_t io_len;
- uint32_t rbase;
- uint32_t rlen;
+ const char * name;
+ uint16_t vendor_id;
+ uint16_t device_id;
+ unsigned long cfg_addr;
+ unsigned long cfg_data;
+ unsigned long cfg_base;
+ unsigned long cfg_len;
+ unsigned long mem_base;
+ unsigned long mem_len;
+ unsigned long io_base;
+ unsigned long io_len;
+ unsigned long rbase;
+ unsigned long rlen;
};
+extern pci_arch_t *arch;
+
#endif /* _H_PCI */
Modified: openbios-devel/include/ppc/pci.h
===================================================================
--- openbios-devel/include/ppc/pci.h 2008-11-29 13:10:17 UTC (rev 269)
+++ openbios-devel/include/ppc/pci.h 2008-11-29 13:18:32 UTC (rev 270)
@@ -3,7 +3,7 @@
#include "asm/io.h"
-#if !(PCI_CONFIG_1 || PCI_CONFIG_2)
+#if !(defined(PCI_CONFIG_1) || defined(PCI_CONFIG_2))
#define PCI_CONFIG_1 1 /* default */
#endif
@@ -11,8 +11,6 @@
/* PCI Configuration Mechanism #1 */
-extern pci_arch_t *arch;
-
#define PCI_ADDR(bus, dev, fn) \
((pci_addr) (arch->cfg_base \
| (uint32_t) (bus) << 16 \
Modified: openbios-devel/include/sparc64/pci.h
===================================================================
--- openbios-devel/include/sparc64/pci.h 2008-11-29 13:10:17 UTC (rev 269)
+++ openbios-devel/include/sparc64/pci.h 2008-11-29 13:18:32 UTC (rev 270)
@@ -11,10 +11,8 @@
/* PCI Configuration Mechanism #1 */
-/* Have pci_addr in the same format as the values written to 0xcf8
- * so register accesses can be made easy. */
#define PCI_ADDR(bus, dev, fn) \
- ((pci_addr) (0x80000000u \
+ ((pci_addr) (arch->cfg_base \
| (uint32_t) (bus) << 16 \
| (uint32_t) (dev) << 11 \
| (uint32_t) (fn) << 8))
@@ -23,46 +21,47 @@
#define PCI_DEV(pcidev) ((uint8_t) ((pcidev) >> 11) & 0x1f)
#define PCI_FN(pcidev) ((uint8_t) ((pcidev) >> 8) & 7)
-#define APB_SPECIAL_BASE 0x1fe00000000ULL
-#define PCI_CONFIG (APB_SPECIAL_BASE + 0x1000000ULL)
-#define APB_MEM_BASE 0x1ff00000000ULL
-
static inline uint8_t pci_config_read8(pci_addr dev, uint8_t reg)
{
- out_le32((void *)PCI_CONFIG, dev | (reg & ~3));
- return in_8((void *)(APB_MEM_BASE | (reg & 3)));
+ uint8_t res;
+ out_le32((unsigned *)arch->cfg_addr, dev | (reg & ~3));
+ res = in_8((unsigned char*)(arch->cfg_data + (reg & 3)));
+ return res;
}
static inline uint16_t pci_config_read16(pci_addr dev, uint8_t reg)
{
- out_le32((void *)PCI_CONFIG, dev | (reg & ~3));
- return in_le16((void *)(APB_MEM_BASE | (reg & 2)));
+ uint16_t res;
+ out_le32((unsigned *)arch->cfg_addr, dev | (reg & ~3));
+ res = in_le16((unsigned short*)(arch->cfg_data + (reg & 2)));
+ return res;
}
static inline uint32_t pci_config_read32(pci_addr dev, uint8_t reg)
{
- out_le32((void *)PCI_CONFIG, dev | reg);
- return in_le32((void *)(APB_MEM_BASE | reg));
+ uint32_t res;
+ out_le32((unsigned *)arch->cfg_addr, dev | reg);
+ res = in_le32((unsigned *)(arch->cfg_data + reg));
+ return res;
}
static inline void pci_config_write8(pci_addr dev, uint8_t reg, uint8_t val)
{
- out_le32((void *)PCI_CONFIG, dev | (reg & ~3));
- out_8((void *)(APB_MEM_BASE | (reg & 3)), val);
+ out_le32((unsigned *)arch->cfg_addr, dev | (reg & ~3));
+ out_8((unsigned char*)(arch->cfg_data + (reg & 3)), val);
}
static inline void pci_config_write16(pci_addr dev, uint8_t reg, uint16_t val)
{
- out_le32((void *)PCI_CONFIG, dev | (reg & ~3));
- out_le16((void *)(APB_MEM_BASE | (reg & 2)), val);
+ out_le32((unsigned *)arch->cfg_addr, dev | (reg & ~3));
+ out_le16((unsigned short *)(arch->cfg_data + (reg & 2)), val);
}
static inline void pci_config_write32(pci_addr dev, uint8_t reg, uint32_t val)
{
- out_le32((void *)PCI_CONFIG, dev | reg);
- out_le32((void *)(APB_MEM_BASE | reg), val);
+ out_le32((unsigned *)arch->cfg_addr, dev | reg);
+ out_le32((unsigned *)(arch->cfg_data + reg), val);
}
-
#else /* !PCI_CONFIG_1 */
#error PCI Configuration Mechanism is not specified or implemented
#endif
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