[OpenBIOS] r726 - cpu/x86/pc/olpc
svn at openbios.org
svn at openbios.org
Wed Nov 14 08:11:25 CET 2007
Author: wmb
Date: 2007-11-14 08:11:25 +0100 (Wed, 14 Nov 2007)
New Revision: 726
Modified:
cpu/x86/pc/olpc/draminit.fth
cpu/x86/pc/olpc/resume.bth
cpu/x86/pc/olpc/rmstart.fth
cpu/x86/pc/olpc/romreset.bth
Log:
OLPC - added CMOS RAM writes to suspend/resume sequence to record the
progress in case of failures.
Modified: cpu/x86/pc/olpc/draminit.fth
===================================================================
--- cpu/x86/pc/olpc/draminit.fth 2007-11-08 21:59:58 UTC (rev 725)
+++ cpu/x86/pc/olpc/draminit.fth 2007-11-14 07:11:25 UTC (rev 726)
@@ -1,4 +1,8 @@
h# 18 # al mov al h# 80 # out
+ h# 1430 # dx mov dx ax in h# 9999 # ax cmp = if
+ h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34
+ h# 18 # al mov al h# 71 # out \ Write value 01
+ then
\ Enable DLL, load Extended Mode Register by set and clear PROG_DRAM
20000018 rmsr
@@ -40,6 +44,10 @@
ax h# ffff0 #) mov
h# 19 # al mov al h# 80 # out
+ h# 1430 # dx mov dx ax in h# 9999 # ax cmp = if
+ h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34
+ h# 19 # al mov al h# 71 # out \ Write value 01
+ then
\ Turn on the cache
cr0 ax mov
@@ -48,6 +56,11 @@
invd
h# 1a # al mov al h# 80 # out
+ h# 1430 # dx mov dx ax in h# 9999 # ax cmp = if
+ h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34
+ h# 1a # al mov al h# 71 # out \ Write value 01
+ then
+
0000f001.00001400. 5140000f set-msr \ PMS BAR
\ It is tempting to test bit 0 of PM register 5c, but a 5536 erratum
@@ -58,6 +71,9 @@
1430 port-rl h# 9999 # ax cmp = if \ Wakeup event flag
0 1430 port-wl
h# 1b # al mov al h# 80 # out
+ h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34
+ h# 1b # al mov al h# 71 # out \ Write value 01
+
char r 3f8 port-wb begin 3fd port-rb 40 bitand 0<> until
resume-data # sp mov
Modified: cpu/x86/pc/olpc/resume.bth
===================================================================
--- cpu/x86/pc/olpc/resume.bth 2007-11-08 21:59:58 UTC (rev 725)
+++ cpu/x86/pc/olpc/resume.bth 2007-11-14 07:11:25 UTC (rev 726)
@@ -33,6 +33,10 @@
h# efc0.0000 constant uoc-pa
h# 1000 constant gpio-port
+: resume-progress ( byte -- )
+ " h# 34 # al mov al h# 70 # out ( byte ) # al mov al h# 71 # out" eval
+;
+
start-assembling \ Turn on the target assembler
protected-mode
@@ -60,6 +64,8 @@
gs push
ss push dx pop \ SS in dx
+ h# f0 resume-progress
+
here 5 + dup #) call di pop \ Virtual address of EIP in DI
( here ) asm-base - # di sub \ Virtual address of suspend-base in DI
@@ -79,6 +85,8 @@
\ Physical addresses from now on
+ h# f1 resume-progress
+
\ suspend-physical
\ here suspend-entry put-branch
resume-data # bp mov
@@ -287,6 +295,8 @@
\ h# 0100.ffff h# 1840 port-wl \ Enable Power button wakeup, clear status bits
h# ffff.ffff h# 1858 port-wl \ Clear all status bits
+ h# fe resume-progress
+
wbinvd \ Flush the cache
h# 00ff.ff00 h# 2000.0018 bitclr-msr \ Set refresh to 0, disabling GX refresh
@@ -325,6 +335,8 @@
cld
+ h# 20 resume-progress
+
\ MSR init
h# 30 [bp] si mov \ MSR table start address
si bx mov
@@ -338,6 +350,8 @@
si bx cmp
= until
+ h# 21 resume-progress
+
[ifdef] checksum-test
\ Checksum memory from 1M to top (excluding framebuffer)
bx bx xor
@@ -356,6 +370,8 @@
ax lods ax dx xchg ax lods ax dx xchg h# c000.2001 wmsr \ Video output format
ax lods ax dx xchg ax lods ax dx xchg h# c000.2011 wmsr \ TFTP pad select
+ h# 22 resume-progress
+
[ifdef] reset-smbus-bitbang
\ GPIO15 is SMB_DATA
\ GPIO14 is SMB_CLOCK
@@ -389,6 +405,8 @@
begin rdtsc bx ax sub 0>= until
[then]
+ h# 23 resume-progress
+
h# 1038 # dx mov \ Low bank - first contiguous GPIO register
h# 3c /l / # cx mov \ Register count (stop at lock register)
begin
@@ -424,6 +442,8 @@
ax lods h# 10c4 # dx mov ax dx out \ Neg edge enable
ax lods h# 10bc # dx mov ax dx out \ High bank lock
+ h# 24 resume-progress
+
[ifdef] save-display
\ \ h# 3c 0 do l at + i gp! 4 +loop l at + h# 4c gp!
@@ -482,6 +502,8 @@
h# 500.0000 # vp-pa h# 410 + #) mov
[then]
+ h# 25 resume-progress
+
\ 0 h# 1842 pw! \ Disable power button during early startup
\ Restore Interrupt controller setup
@@ -507,6 +529,8 @@
al lods h# 4d0 # dx mov al dx out \ Edge/level low
al lods h# 4d1 # dx mov al dx out \ Edge/level high
+ h# 26 resume-progress
+
\ Restore PIT (timer)
h# 30 # al mov al h# 43 # out \ Load LSB,MSB for counter 0
al lods al h# 40 out
@@ -524,6 +548,8 @@
al lods al h# 61 # out
al lods h# 5140.0037 wmsr \ PIT Count Enable MSR - high bits irrelevant
+ h# 27 resume-progress
+
\ SMBUS controller
h# 18b3 # dx mov \ SMBUS base port
al lods al dx out \ Reg 3
@@ -571,6 +597,8 @@
\ End of DCON SMbus reset dance
[then]
+ h# 28 resume-progress
+
\ MFGPTs 0-5. MFGPT 6 and 7 are in the standby domain, live during suspend
h# 1800 # dx mov \ MFGPT base port
h# 18 # cx mov
@@ -579,6 +607,8 @@
dx inc dx inc
loopa
+ h# 29 resume-progress
+
\ AC97
\ Codec
@@ -595,6 +625,8 @@
h# 100 # h# 58 [bx] mov \ HcRhPortStatus[2] register - Power on
[then]
+ h# 2a resume-progress
+
\ Restore CaFe configuration
h# 6010 config-setup ax lods ax dx out \ NAND BAR
@@ -629,6 +661,8 @@
h# 100 # h# 60 [bx] mov \ HcRhPortStatus[4] register - Power on
[then]
+ h# 2b resume-progress
+
\ Display stuff
h# 4758 # h# fe00.4000 #) mov \ Unlock display controller registers
@@ -648,6 +682,8 @@
\ DCON fiddling
\ USB
+ h# 2c resume-progress
+
h# 2c [bp] di mov \ VA of suspend-base in di
h# 28 [bp] si mov \ PDIR VA
h# 24 [bp] cx mov \ PDIR entry 0
@@ -667,6 +703,8 @@
\ Force the paging enable to take place
h# eb asm8, 0 asm8, \ jmp to next location to enable paging
+ h# 2d resume-progress
+
\ Now jump back to the virtual execution address
here asm-base - 8 + # di add \ The add instruction is 6 bytes, the jmp is 2
di jmp
Modified: cpu/x86/pc/olpc/rmstart.fth
===================================================================
--- cpu/x86/pc/olpc/rmstart.fth 2007-11-08 21:59:58 UTC (rev 725)
+++ cpu/x86/pc/olpc/rmstart.fth 2007-11-14 07:11:25 UTC (rev 726)
@@ -156,9 +156,20 @@
op: h# 510100e1 # cx mov \ IOD Base Mask 1 MSR
wrmsr
+ op: h# 0000f001 # dx mov \ Maps I/O space at 0x1400 to the
+ op: h# 00001400 # ax mov \ power management registers
+ op: h# 5140000f # cx mov \ PMS BAR
+ wrmsr
+
\ Writes 4 to CODEC register 0x76 to turn off VBIAS (VREFOUT)
op: h# 7601.0004 # ax mov op: h# 148c # dx mov op: ax dx out
+ op: h# 1430 # dx mov op: dx ax in op: h# 9999 # ax cmp = if
+ h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34
+ h# 01 # al mov al h# 71 # out \ Write value 01
+ then
+
+
\ End of MIC LED code.
\ This code is highly optimized because it runs when the CPU is in
@@ -176,12 +187,12 @@
al al test 0= if
rdmsr \ Get base MSR value with divisors
op: h# 04de.0000 # ax or \ Set the startup time (de) and breadcrumb (4)
- op: h# 0000.04d9 # dx mov \ PLL value for 133 MB clk, 433 CPU
+ op: h# 0000.04d9 # dx mov \ PLL value for 333 MB clk, 433 CPU
else
al dec al h# 71 # out \ Decrement safety counter
rdmsr \ Get base MSR value with divisors
op: h# 04de.0000 # ax or \ Set the startup time (de) and breadcrumb (4)
- op: h# 0000.04d9 # dx mov \ PLL value for 167 MB clk, 433 CPU
+ op: h# 0000.04d3 # dx mov \ PLL value for 333 MB clk, 333 CPU
then
wrmsr \ Put in the base value
op: h# 0000.1800 invert # ax and \ Turn off the BYPASS bits
@@ -208,6 +219,12 @@
\ Return to here after the reset
h# 02 # al mov al h# 80 # out
+ op: h# 1430 # dx mov op: dx ax in op: h# 9999 # ax cmp = if
+ h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34
+ h# 02 # al mov al h# 71 # out \ Write value 01
+ then
+
+
[ifdef] init-com1 init-com1 [then]
[ifdef] debug-reset
@@ -235,6 +252,12 @@
h# 03 # al mov al h# 80 # out
+ op: h# 1430 # dx mov op: dx ax in op: h# 9999 # ax cmp = if
+ h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34
+ h# 01 # al mov al h# 71 # out \ Write value 01
+ then
+
+
\ We are in protected mode, but we are still executing from old
\ 16-bit code segment, and will continue to do so until the far jump
\ below
@@ -263,6 +286,12 @@
[then]
h# 0f # al mov al h# 80 # out
+
+ op: h# 1430 # dx mov op: dx ax in op: h# 9999 # ax cmp = if
+ h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34
+ h# 0f # al mov al h# 71 # out \ Write value 01
+ then
+
op: ad: ResetBase h# 10 #) far jmp \ Jump to Forth startup
real-mode
Modified: cpu/x86/pc/olpc/romreset.bth
===================================================================
--- cpu/x86/pc/olpc/romreset.bth 2007-11-08 21:59:58 UTC (rev 725)
+++ cpu/x86/pc/olpc/romreset.bth 2007-11-14 07:11:25 UTC (rev 726)
@@ -52,6 +52,11 @@
label startup
h# 10 # al mov al h# 80 # out
+ h# 1430 # dx mov dx ax in h# 9999 # ax cmp = if
+ h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34
+ h# 10 # al mov al h# 71 # out \ Write value 01
+ then
+
long-offsets on
h# 4c000017 rmsr h# 10 bitand 0<> if \ LX branch
@@ -118,6 +123,11 @@
[then] \ lx-devel
h# 11 # al mov al h# 80 # out
+ h# 1430 # dx mov dx ax in h# 9999 # ax cmp = if
+ h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34
+ h# 11 # al mov al h# 71 # out \ Write value 01
+ then
+
\ Init memory controller
\ sdram_initialize,generic_sdram.c
@@ -263,6 +273,11 @@
[then]
h# 11 # al mov al h# 80 # out
+ h# 1430 # dx mov dx ax in h# 9999 # ax cmp = if
+ h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34
+ h# 10 # al mov al h# 71 # out \ Write value 01
+ then
+
\ Init memory controller
\ sdram_initialize,generic_sdram.c
@@ -322,6 +337,10 @@
\ char b 3f8 port-wb begin 3fd port-rb 40 bitand 0<> until
h# 12 # al mov al h# 80 # out
+ h# 1430 # dx mov dx ax in h# 9999 # ax cmp = if
+ h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34
+ h# 12 # al mov al h# 71 # out \ Write value 01
+ then
fload ${BP}/cpu/x86/pc/olpc/draminit.fth
@@ -337,6 +356,11 @@
\ Now we can use the stack and do conventional subroutine calls
h# 1f # al mov al h# 80 # out
+ h# 1430 # dx mov dx ax in h# 9999 # ax cmp = if
+ h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34
+ h# 1f # al mov al h# 71 # out \ Write value 01
+ then
+
fload ${BP}/cpu/x86/pc/resetend.fth
end-code
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