[OpenBIOS] r150 - in openbios-devel: arch/sparc32 drivers

svn at openbios.org svn at openbios.org
Sun May 27 21:49:35 CEST 2007


Author: blueswirl
Date: 2007-05-27 21:49:35 +0200 (Sun, 27 May 2007)
New Revision: 150

Modified:
   openbios-devel/arch/sparc32/entry.S
   openbios-devel/arch/sparc32/romvec.c
   openbios-devel/drivers/obio.c
   openbios-devel/drivers/obio.h
Log:
Try to fix system reset for SMP and SS-10 cases


Modified: openbios-devel/arch/sparc32/entry.S
===================================================================
--- openbios-devel/arch/sparc32/entry.S	2007-05-19 12:55:01 UTC (rev 149)
+++ openbios-devel/arch/sparc32/entry.S	2007-05-27 19:49:35 UTC (rev 150)
@@ -57,6 +57,7 @@
         ! Check if this not the first SMP CPU, if so, bypass PROM entirely
         set     PHYS_JJ_EEPROM + 0x2E, %g1
         lduba   [%g1] ASI_M_BYPASS, %g2
+        stba    %g0, [%g1] ASI_M_BYPASS
         set	PHYS_JJ_EEPROM + 0x30, %g1
         lda	[%g1] ASI_M_BYPASS, %g1
         tst     %g2
@@ -71,15 +72,18 @@
         add     %g2, 4, %g2
         sta     %g0, [%g2] ASI_M_BYPASS         ! clear softints
         set     PHYS_JJ_EEPROM + 0x3C, %g1
-        lda     [%g1] ASI_M_BYPASS, %g1
-        set     AC_M_CTPR, %g2
-        sta     %g1, [%g2] ASI_M_MMUREGS        ! set ctx table ptr
+        lda     [%g1] ASI_M_BYPASS, %g2
+        sta     %g0, [%g1] ASI_M_BYPASS
+        set     AC_M_CTPR, %g1
+        sta     %g2, [%g1] ASI_M_MMUREGS        ! set ctx table ptr
         set     PHYS_JJ_EEPROM + 0x40, %g1
-        lda     [%g1] ASI_M_BYPASS, %g1
-        set     AC_M_CXR, %g2
-        sta     %g1, [%g2] ASI_M_MMUREGS        ! set context
+        lda     [%g1] ASI_M_BYPASS, %g2
+        sta     %g0, [%g1] ASI_M_BYPASS
+        set     AC_M_CXR, %g1
+        sta     %g2, [%g1] ASI_M_MMUREGS        ! set context
         set     PHYS_JJ_EEPROM + 0x38, %g1
         lda     [%g1] ASI_M_BYPASS, %g2
+        sta     %g0, [%g1] ASI_M_BYPASS
         set     1, %g1
         jmp     %g2                             ! jump to kernel
          sta    %g1, [%g0] ASI_M_MMUREGS        ! enable mmu
@@ -111,6 +115,7 @@
         ! Check if this not the first SMP CPU, if so, bypass PROM entirely
         set     PHYS_SS10_EEPROM + 0x2E, %g1
         lduba   [%g1] ASI_M_CTL, %g2
+        stba    %g0, [%g2] ASI_M_CTL
         set	PHYS_SS10_EEPROM + 0x30, %g1
         lda	[%g1] ASI_M_CTL, %g1
         tst     %g2
@@ -124,15 +129,18 @@
         add     %g2, 4, %g2
         sta     %g0, [%g2] ASI_M_CTL         ! clear softints
         set     PHYS_SS10_EEPROM + 0x3C, %g1
-        lda     [%g1] ASI_M_CTL, %g1
-        set     AC_M_CTPR, %g2
-        sta     %g1, [%g2] ASI_M_MMUREGS        ! set ctx table ptr
+        lda     [%g1] ASI_M_CTL, %g2
+        sta     %g0, [%g1] ASI_M_CTL
+        set     AC_M_CTPR, %g1
+        sta     %g2, [%g1] ASI_M_MMUREGS        ! set ctx table ptr
         set     PHYS_JJ_EEPROM + 0x40, %g1
-        lda     [%g1] ASI_M_CTL, %g1
-        set     AC_M_CXR, %g2
-        sta     %g1, [%g2] ASI_M_MMUREGS        ! set context
+        lda     [%g1] ASI_M_CTL, %g2
+        sta     %g0, [%g1] ASI_M_CTL
+        set     AC_M_CXR, %g1
+        sta     %g2, [%g1] ASI_M_MMUREGS        ! set context
         set     PHYS_SS10_EEPROM + 0x38, %g1
         lda     [%g1] ASI_M_CTL, %g2
+        sta     %g0, [%g1] ASI_M_CTL
         set     1, %g1
         jmp     %g2                             ! jump to kernel
          sta    %g1, [%g0] ASI_M_MMUREGS        ! enable mmu

Modified: openbios-devel/arch/sparc32/romvec.c
===================================================================
--- openbios-devel/arch/sparc32/romvec.c	2007-05-19 12:55:01 UTC (rev 149)
+++ openbios-devel/arch/sparc32/romvec.c	2007-05-27 19:49:35 UTC (rev 150)
@@ -246,22 +246,31 @@
 
 static void obp_reboot(char *str)
 {
+    extern volatile int *reset_reg;
+
     printk("rebooting (%s)\n", str);
-    outb(1, 0x71f00000);
+    *reset_reg = 1;
+    printk("reboot failed\n");
     for (;;) {}
 }
 
 static void obp_abort(void)
 {
+    extern volatile int *power_reg;
+
     printk("abort, power off\n");
-    outb(1, 0x71910000);
+    *power_reg = 1;
+    printk("power off failed\n");
     for (;;) {}
 }
 
 static void obp_halt(void)
 {
+    extern volatile int *power_reg;
+
     printk("halt, power off\n");
-    outb(1, 0x71910000);
+    *power_reg = 1;
+    printk("power off failed\n");
     for (;;) {}
 }
 

Modified: openbios-devel/drivers/obio.c
===================================================================
--- openbios-devel/drivers/obio.c	2007-05-19 12:55:01 UTC (rev 149)
+++ openbios-devel/drivers/obio.c	2007-05-27 19:49:35 UTC (rev 150)
@@ -809,13 +809,18 @@
     fword("finish-device");
 }
 
+volatile int *power_reg, *reset_reg;
+
 static void
 ob_power_init(uint64_t base, uint64_t offset, int intr)
 {
     ob_new_obio_device("power", NULL);
 
-    ob_reg(base, offset, POWER_REGS, 0);
+    power_reg = ob_reg(base, offset, POWER_REGS, 1);
 
+    // Not in device tree
+    reset_reg = map_io(base + (uint64_t)SLAVIO_RESET, RESET_REGS);
+
     ob_intr(intr);
 
     fword("finish-device");

Modified: openbios-devel/drivers/obio.h
===================================================================
--- openbios-devel/drivers/obio.h	2007-05-19 12:55:01 UTC (rev 149)
+++ openbios-devel/drivers/obio.h	2007-05-27 19:49:35 UTC (rev 150)
@@ -29,6 +29,9 @@
 #define SLAVIO_INTERRUPT 0x00e00000ULL
 #define INTERRUPT_REGS   0x10
 
+#define SLAVIO_RESET     0x00f00000ULL
+#define RESET_REGS       1
+
 #define SLAVIO_SIZE      0x01000000
 
 struct qemu_nvram_v1 {




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