[OpenBIOS] r49 - in openbios-devel: arch/sparc32 drivers
svn@openbios.org
svn at openbios.org
Wed Jun 7 00:23:05 CEST 2006
Author: stepan
Date: 2006-06-07 00:23:04 +0200 (Wed, 07 Jun 2006)
New Revision: 49
Modified:
openbios-devel/arch/sparc32/console.c
openbios-devel/arch/sparc32/entry.S
openbios-devel/arch/sparc32/ldscript
openbios-devel/arch/sparc32/romvec.c
openbios-devel/arch/sparc32/tree.fs
openbios-devel/drivers/obio.c
openbios-devel/drivers/obio.h
Log:
openbios.patch-22.bz2 from blueswirl
Modified: openbios-devel/arch/sparc32/console.c
===================================================================
--- openbios-devel/arch/sparc32/console.c 2006-06-05 20:34:53 UTC (rev 48)
+++ openbios-devel/arch/sparc32/console.c 2006-06-06 22:23:04 UTC (rev 49)
@@ -153,17 +153,7 @@
void tcx_init(unsigned long base)
{
-#if 1
- unsigned int i;
-
- // Create 1:1 mapping for video memory
- for (i = 0; i < VMEM_SIZE; i += 4096) {
- map_page(base + VMEM_BASE + i, base + VMEM_BASE + i, 0);
- }
- vmem = (char *)base + VMEM_BASE;
-#else
vmem = map_io(base + VMEM_BASE, VMEM_SIZE);
-#endif
dac = map_io(base + DAC_BASE, DAC_SIZE);
console_init();
Modified: openbios-devel/arch/sparc32/entry.S
===================================================================
--- openbios-devel/arch/sparc32/entry.S 2006-06-05 20:34:53 UTC (rev 48)
+++ openbios-devel/arch/sparc32/entry.S 2006-06-06 22:23:04 UTC (rev 49)
@@ -11,7 +11,8 @@
#include "asi.h"
#include "asm/crs.h"
-#define PHYS_JJ_EEPROM 0x71200000
+#define PHYS_JJ_EEPROM 0x71200000 /* [2000] MK48T08 */
+#define PHYS_JJ_INTR0 0x71E00000 /* CPU0 interrupt control registers */
#define WRITE_PAUSE nop; nop; nop; /* Have to do this after %wim/%psr chg */
@@ -35,6 +36,35 @@
*/
/* XXX no switching yet */
+ ! Check if this not the first SMP CPU, if so, bypass PROM entirely
+ set PHYS_JJ_EEPROM + 0x2E, %g1
+ lduba [%g1] ASI_M_BYPASS, %g2
+ tst %g2
+ bz first_cpu
+ nop
+
+ set PHYS_JJ_INTR0 + 0x04, %g1
+ sll %g2, 12, %g2
+ add %g1, %g2, %g2
+ set 0xffffffff, %g1
+ sta %g1, [%g2] ASI_M_BYPASS ! clear softints
+ add %g2, 4, %g2
+ sta %g0, [%g2] ASI_M_BYPASS ! clear softints
+ set PHYS_JJ_EEPROM + 0x3C, %g1
+ lda [%g1] ASI_M_BYPASS, %g1
+ set AC_M_CTPR, %g2
+ sta %g1, [%g2] ASI_M_MMUREGS ! set ctx table ptr
+ set PHYS_JJ_EEPROM + 0x40, %g1
+ lda [%g1] ASI_M_BYPASS, %g1
+ set AC_M_CXR, %g2
+ sta %g1, [%g2] ASI_M_MMUREGS ! set context
+ set PHYS_JJ_EEPROM + 0x38, %g1
+ lda [%g1] ASI_M_BYPASS, %g2
+ set 1, %g1
+ jmp %g2 ! jump to kernel
+ sta %g1, [%g0] ASI_M_MMUREGS ! enable mmu
+
+first_cpu:
set PHYS_JJ_EEPROM + 0x30, %g1
lda [%g1] ASI_M_BYPASS, %g1
! map PROLDATA to PROLBASE+PROLSIZE to end of ram
Modified: openbios-devel/arch/sparc32/ldscript
===================================================================
--- openbios-devel/arch/sparc32/ldscript 2006-06-05 20:34:53 UTC (rev 48)
+++ openbios-devel/arch/sparc32/ldscript 2006-06-06 22:23:04 UTC (rev 49)
@@ -14,7 +14,7 @@
HEAP_SIZE = 16384;
STACK_SIZE = 16384;
VMEM_SIZE = 128 * 1024;
-IOMEM_SIZE = 256 * 1024;
+IOMEM_SIZE = 256 * 1024 + 768 * 1024;
SECTIONS
{
Modified: openbios-devel/arch/sparc32/romvec.c
===================================================================
--- openbios-devel/arch/sparc32/romvec.c 2006-06-05 20:34:53 UTC (rev 48)
+++ openbios-devel/arch/sparc32/romvec.c 2006-06-06 22:23:04 UTC (rev 49)
@@ -366,30 +366,27 @@
return ret;
}
+extern int start_cpu(unsigned int pc, unsigned int context_ptr,
+ unsigned int context, int cpu);
+
static int obp_cpustart(__attribute__((unused))unsigned int whichcpu,
__attribute__((unused))int ctxtbl_ptr,
__attribute__((unused))int thiscontext,
__attribute__((unused))char *prog_counter)
{
- //int cpu, found;
-#ifdef CONFIG_DEBUG_OBP
+ int cpu, found;
struct linux_prom_registers *smp_ctable = (void *)ctxtbl_ptr;
-#endif
DPRINTF("obp_cpustart: cpu %d, ctxptr 0x%x, ctx %d, pc 0x%x\n", whichcpu,
smp_ctable->phys_addr, thiscontext, (unsigned int)prog_counter);
-#if 0
+
found = obp_getprop(whichcpu, "mid", (char *)&cpu);
if (found == -1)
return -1;
- st_bypass(PHYS_JJ_EEPROM + 0x38, (unsigned int)prog_counter);
- st_bypass(PHYS_JJ_EEPROM + 0x3C, ((unsigned int)smp_ctable->phys_addr) >> 4);
- st_bypass(PHYS_JJ_EEPROM + 0x40, thiscontext);
- DPRINTF("obp_cpustart: sending interrupt to CPU %d\n", cpu);
- st_bypass(PHYS_JJ_INTR0 + 0x1000 * cpu + 8, 0x40000000);
-#endif
+ DPRINTF("cpu found, id %d -> cpu %d\n", whichcpu, cpu);
- return 0;
+ return start_cpu((unsigned int)prog_counter, ((unsigned int)smp_ctable->phys_addr) >> 4,
+ thiscontext, cpu);
}
static int obp_cpustop(__attribute__((unused)) unsigned int whichcpu)
Modified: openbios-devel/arch/sparc32/tree.fs
===================================================================
--- openbios-devel/arch/sparc32/tree.fs 2006-06-05 20:34:53 UTC (rev 48)
+++ openbios-devel/arch/sparc32/tree.fs 2006-06-06 22:23:04 UTC (rev 49)
@@ -29,35 +29,6 @@
finish-device
new-device
- " FMI,MB86904" device-name
- " cpu" device-type
-
- \ 0 encode-int 0 encode-int encode+ 0 encode-int encode+ " context-table" property
- 0 encode-int " implementation" property
- d# 4 encode-int " version" property
-
- d# 32 encode-int " cache-line-size" property
- d# 512 encode-int " cache-nlines" property
-
- d# 4096 encode-int " page-size" property
-
- d# 16 encode-int " dcache-line-size" property
- d# 512 encode-int " dcache-nlines" property
- d# 1 encode-int " dcache-associativity" property
-
- d# 16 encode-int " icache-line-size" property
- d# 512 encode-int " icache-nlines" property
- d# 1 encode-int " icache-associativity" property
-
- d# 2 encode-int " ncaches" property
- d# 256 encode-int " mmu-nctx" property
- d# 8 encode-int " sparc-version" property
- d# 37 encode-int " mask_rev" property
-
- \ 1 encode-int " mid" property
-finish-device
-
-new-device
" iommu" device-name
2 encode-int " #address-cells" property
1 encode-int " #size-cells" property
Modified: openbios-devel/drivers/obio.c
===================================================================
--- openbios-devel/drivers/obio.c 2006-06-05 20:34:53 UTC (rev 48)
+++ openbios-devel/drivers/obio.c 2006-06-06 22:23:04 UTC (rev 49)
@@ -148,6 +148,8 @@
extern uint32_t cmdline_size;
extern char boot_device;
+ unsigned int i;
+
ob_new_obio_device("eeprom", NULL);
nvram = (char *)ob_reg(base, offset, NVRAM_SIZE, 1);
@@ -170,6 +172,7 @@
fword("finish-device");
+ // Add /idprom
push_str("/");
fword("find-device");
@@ -178,6 +181,103 @@
fword("encode-bytes");
push_str("idprom");
fword("property");
+
+ // Add cpus
+ printk("CPUs: %x\n", nv_info.smp_cpus);
+ for (i = 0; i < (unsigned int)nv_info.smp_cpus; i++) {
+ push_str("/");
+ fword("find-device");
+
+ fword("new-device");
+
+ push_str("FMI,MB86904");
+ fword("device-name");
+
+ push_str("cpu");
+ fword("device-type");
+
+ PUSH(0);
+ fword("encode-int");
+ push_str("implementation");
+ fword("property");
+
+ PUSH(4);
+ fword("encode-int");
+ push_str("version");
+ fword("property");
+
+ PUSH(32);
+ fword("encode-int");
+ push_str("cache-line-size");
+ fword("property");
+
+ PUSH(512);
+ fword("encode-int");
+ push_str("cache-nlines");
+ fword("property");
+
+ PUSH(4096);
+ fword("encode-int");
+ push_str("page-size");
+ fword("property");
+
+ PUSH(16);
+ fword("encode-int");
+ push_str("dcache-line-size");
+ fword("property");
+
+ PUSH(512);
+ fword("encode-int");
+ push_str("dcache-nlines");
+ fword("property");
+
+ PUSH(1);
+ fword("encode-int");
+ push_str("dcache-associativity");
+ fword("property");
+
+ PUSH(16);
+ fword("encode-int");
+ push_str("icache-line-size");
+ fword("property");
+
+ PUSH(512);
+ fword("encode-int");
+ push_str("icache-nlines");
+ fword("property");
+
+ PUSH(1);
+ fword("encode-int");
+ push_str("icache-associativity");
+ fword("property");
+
+ PUSH(2);
+ fword("encode-int");
+ push_str("ncaches");
+ fword("property");
+
+ PUSH(256);
+ fword("encode-int");
+ push_str("mmu-nctx");
+ fword("property");
+
+ PUSH(8);
+ fword("encode-int");
+ push_str("sparc-version");
+ fword("property");
+
+ PUSH(37);
+ fword("encode-int");
+ push_str("mask_rev");
+ fword("property");
+
+ PUSH(i << 3);
+ fword("encode-int");
+ push_str("mid");
+ fword("property");
+
+ fword("finish-device");
+ }
}
static void
@@ -259,10 +359,11 @@
regs->cpu_timers[0].l14_timer_limit = 0;
}
+static volatile struct sun4m_intregs *intregs;
+
static void
ob_interrupt_init(unsigned long base, unsigned long offset)
{
- volatile struct sun4m_intregs *regs;
ob_new_obio_device("interrupt", NULL);
@@ -286,21 +387,35 @@
push_str("reg");
fword("property");
- regs = map_io(base + offset, sizeof(*regs));
- regs->set = ~SUN4M_INT_MASKALL;
- regs->cpu_intregs[0].clear = ~0x17fff;
-
- // is this really correct?
- PUSH(regs);
+ intregs = map_io(base + offset, sizeof(*intregs));
+ intregs->set = ~SUN4M_INT_MASKALL;
+ intregs->cpu_intregs[0].clear = ~0x17fff;
+
+ PUSH(0);
fword("encode-int");
- PUSH(regs);
+ PUSH((int)intregs);
fword("encode-int");
fword("encode+");
push_str("address");
fword("property");
fword("finish-device");
+}
+int
+start_cpu(unsigned int pc, unsigned int context_ptr, unsigned int context, int cpu)
+{
+ if (!cpu)
+ return -1;
+
+ nvram[0x38] = pc;
+ nvram[0x3c] = context_ptr;
+ nvram[0x40] = context;
+ nvram[0x2e] = cpu & 0xff;
+
+ intregs->cpu_intregs[cpu].set = SUN4M_SOFT_INT(14);
+
+ return 0;
}
Modified: openbios-devel/drivers/obio.h
===================================================================
--- openbios-devel/drivers/obio.h 2006-06-05 20:34:53 UTC (rev 48)
+++ openbios-devel/drivers/obio.h 2006-06-06 22:23:04 UTC (rev 49)
@@ -37,6 +37,7 @@
uint32_t nvram_size; // not used in Sun4m
char unused1[8];
char arch[12];
+ char curr_cpu;
char smp_cpus;
char unused2;
char nographic;
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