[OpenBIOS] L2 cache
dave at denial.force9.co.uk
Tue Aug 26 17:19:50 CEST 2003
Ronald G Minnich <rminnich at lanl.gov> wrote:
> In case I did not mention it: we aren't turning on L2 cache.
> We need to figure this one out. All hints gratefully accepted ...
Bear in mind that L2 cache can be off-CPU. In the case of my
devel system, I have a VIA VP3 with 1mb of L2 cache on the
motherboard. Enabling this requires flipping a bit in PCI space.
This will be documented in the register-level docs for the chipset.
Other systems (Celeron, P2/P3[xeon]/p4?, K6-2/3, Athlon] have
their caches onboard and require MSR poking. This should be in
the BIOS writers guides for the respective CPUs.
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