[OpenBIOS] POST speeds.
Ronald G. Minnich
rminnich at lanl.gov
Wed Mar 22 08:21:30 CET 2000
On Tue, 21 Mar 2000, David Christensen wrote:
> Don't forget to set the MTRRs (Memory Type and Range Registers I believe) in
> the CPU. Enabling the L2 cache isn't enough, you have to tell the CPU what
> memory ranges it can cache. At a minimum you want to enable write-back on
> the 0-640K and 1M-TOM (top-of-memory) memory ranges. Setting the ROM ranges
> to read-only would be good too.
Well, if anyone wants to contribute code :-)
I'm kind of overloaded right now.
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