[OpenBIOS] devbios on linux ln lx440gx+

Ronald G. Minnich rminnich at lanl.gov
Thu Jan 20 11:47:16 CET 2000


here's the problem. I have a:
Linux rp128 2.2.13 #3 SMP Wed Dec 29 09:04:43 MST 1999 i686 unknown

with:

PCI devices found:
  Bus  0, device   0, function  0:
    Host bridge: Intel Unknown device (rev 0).
      Vendor id=8086. Device id=71a0.
      Medium devsel.  Master Capable.  Latency=64.  
      Prefetchable 32 bit memory at 0xf8000000 [0xf8000008].
  Bus  0, device   1, function  0:
    PCI bridge: Intel Unknown device (rev 0).
      Vendor id=8086. Device id=71a1.
      Medium devsel.  Master Capable.  Latency=64.  Min Gnt=132.
  Bus  0, device  18, function  3:
    Bridge: Intel 82371AB PIIX4 ACPI (rev 2).
      Medium devsel.  Fast back-to-back capable.  


I think the 71a0 is the PCI host bride for the 440gx+, which is close to a
440gx hostbridge (the 440gx is a 7180, I think). I added this to the
devbios pci bridge table:

const struct functions pci_functions[] = {
  { (int[]) { 0x8086122d, 0x80861235, 0x80861237, 0x80861250, 0x80867030,
              0x80867100, 0x80867180, 0x808684c4,
              /* 440gx+? */ 0x808671a0,
              0 },
    (int[]) { 0x8086122e, 0x80861234, 0x80867000, 0x80867110,
              0 },
    intel_shadon, intel_shadoff, intel_wpon, intel_wpoff, intel_backout },


Devbios now finds my pci hostbridge, finds the ISA bridge, and then tries
to probe the BIOS memory with no luck. What this means is that I can't get
to the flash. The flash is an Intel 28F008S5 part.

The values of the hostbridge and PIIX4 registers look like devbios expects
them to. I've moved the jumper to enable BIOS writes. 

Any good ideas on what I could be missing?

Thanks
ron

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