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<carldani> pci(00:14.0, 0x79) |= 0x01; enables 0xC6F decoding.
<carldani> pci(00:14.3, 0x48) |= 0x21; enables 0x2E-0x2F passthrough 
 and enables LPC memory target range (lowest 64k)
<carldani> io(0xc6f) |= 0x40; is Flash program enable (but only if the 
 flash lives on the PCI bus, otherwise that setting is ignored)
<carldani> finally,  io(0xcd6) = 0x03; io(0xcd7) &= ~0x01; clears 
 IRQ0->SMI triggering

<carldani> and since flashrom does not support flashing ROMs living on 
 the PCI bus yet, this doesn't look odd. maybe we should add that
 setting to flashrom

So it seems that we need more than just board enable work.

Luc Verhaegen.