[flashrom] sending my verbose log as requested...

David Hendricks dhendrix at google.com
Fri Sep 18 03:37:14 CEST 2015 

You're locked out of the Management Engine region:

0x5C: 0x00340003 FREG2: WARNING: Management Engine region
(0x00003000-0x00034fff) is locked.
...
Transaction error between offset 0x00003000 and 0x0000303f (= 0x00003000 +
63)!

See http://flashrom.org/ME for details.


On Wed, Sep 16, 2015 at 6:10 PM, Matthew D. Frederes <matt at bitech.biz>
wrote:

> [root at localhost ~]# flashrom -r current.bios -V
> flashrom v0.9.5.2-r1530 on Linux 2.6.32-573.el6.x86_64 (x86_64), built
> with libpci 3.1.4, GCC 4.4.6 20110731 (Red Hat 4.4.6-3), little endian
> flashrom is free software, get the source code at http://www.flashrom.org
>
> Calibrating delay loop... OS timer resolution is 1 usecs, 2496M loops per
> second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1009 us, 10000 myus
> = 10006 us, 4 myus = 4 us, OK.
> Initializing internal programmer
> No coreboot table found.
> DMI string system-manufacturer: "                                "
> DMI string system-product-name: "                                "
> DMI string system-version: "                        "
> DMI string baseboard-manufacturer: "Intel Corporation"
> DMI string baseboard-product-name: "DP35DP"
> DMI string baseboard-version: "AAD81073-209"
> DMI string chassis-type: "Desktop"
> Found chipset "Intel ICH9R" with PCI ID 8086:2916. Enabling flash write...
> 0xfff80000/0xffb80000 FWH IDSEL: 0x0
> 0xfff00000/0xffb00000 FWH IDSEL: 0x0
> 0xffe80000/0xffa80000 FWH IDSEL: 0x1
> 0xffe00000/0xffa00000 FWH IDSEL: 0x1
> 0xffd80000/0xff980000 FWH IDSEL: 0x2
> 0xffd00000/0xff900000 FWH IDSEL: 0x2
> 0xffc80000/0xff880000 FWH IDSEL: 0x3
> 0xffc00000/0xff800000 FWH IDSEL: 0x3
> 0xff700000/0xff300000 FWH IDSEL: 0x4
> 0xff600000/0xff200000 FWH IDSEL: 0x5
> 0xff500000/0xff100000 FWH IDSEL: 0x6
> 0xff400000/0xff000000 FWH IDSEL: 0x7
> 0xfff80000/0xffb80000 FWH decode enabled
> 0xfff00000/0xffb00000 FWH decode enabled
> 0xffe80000/0xffa80000 FWH decode enabled
> 0xffe00000/0xffa00000 FWH decode enabled
> 0xffd80000/0xff980000 FWH decode enabled
> 0xffd00000/0xff900000 FWH decode enabled
> 0xffc80000/0xff880000 FWH decode enabled
> 0xffc00000/0xff800000 FWH decode enabled
> 0xff700000/0xff300000 FWH decode disabled
> 0xff600000/0xff200000 FWH decode disabled
> 0xff500000/0xff100000 FWH decode disabled
> 0xff400000/0xff000000 FWH decode disabled
> Maximum FWH chip size: 0x100000 bytes
> BIOS Lock Enable: enabled, BIOS Write Enable: disabled, BIOS_CNTL is 0xa
> WARNING: Setting 0xdc from 0xa to 0xb on ICH9R failed. New value is 0xa.
> Root Complex Register Block address = 0xfed1c000
> GCS = 0x1464: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x1
> (SPI)
> Top Swap : not enabled
> SPIBAR = 0xfed1c000 + 0x3800
> 0x04: 0xe008 (HSFS)
> HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1
> WARNING: SPI Configuration Lockdown activated.
> Reading OPCODES... done
> 0x06: 0x2f00 (HSFC)
> HSFC: FGO=0, FCYCLE=0, FDBC=47, SME=0
> 0x08: 0x00000000 (FADDR)
> 0x50: 0x00000a0b (FRAP)
> BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b
> 0x54: 0x00000000 FREG0: WARNING: Flash Descriptor region
> (0x00000000-0x00000fff) is read-only.
> 0x58: 0x00ff0035 FREG1: BIOS region (0x00035000-0x000fffff) is read-write.
> 0x5C: 0x00340003 FREG2: WARNING: Management Engine region
> (0x00003000-0x00034fff) is locked.
> 0x60: 0x00020001 FREG3: Gigabit Ethernet region (0x00001000-0x00002fff) is
> read-write.
> Please send a verbose log to flashrom at flashrom.org if this board is not
> listed on
> http://flashrom.org/Supported_hardware#Supported_mainboards yet.
> Writes have been disabled. You can enforce write support with the
> ich_spi_force programmer option, but it will most likely harm your
> hardware!
> If you force flashrom you will get no support if something breaks.
> 0x90: 0x00 (SSFS)
> SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0
> 0x91: 0x004200 (SSFC)
> SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=2, SME=0, SCF=0
> 0x94: 0x0006     (PREOP)
> 0x96: 0x0008     (OPTYPE)
> 0x98: 0x0000ab9f (OPMENU)
> 0x9C: 0x00000000 (OPMENU+4)
> 0xA0: 0x00000000 (BBAR)
> 0xC4: 0x00002009 (LVSCC)
> LVSCC: BES=0x1, WG=0, WSR=1, WEWS=0, EO=0x20, VCL=0
> 0xC8: 0x00002009 (UVSCC)
> UVSCC: BES=0x1, WG=0, WSR=1, WEWS=0, EO=0x20, VCL=0
> 0xD0: 0x00000000 (FPB)
>
> Enabling hardware sequencing because some important opcode is locked.
> SPI Read Configuration: prefetching enabled, caching enabled, PROBLEMS,
> continuing anyway
> The following protocols are supported: FWH, Programmer-specific.
> Probing for Programmer Opaque flash chip, 0 kB: Found 1 attached SPI flash
> chip with a density of 1024 kB.
> There is only one partition containing the whole address space (0x000000 -
> 0x0fffff).
> There are 256 erase blocks with 4096 B each.
> Found Programmer flash chip "Opaque flash chip" (1024 kB,
> Programmer-specific) at physical address 0x0.
> Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x67, id2 0x21,
> id1 is normal flash content, id2 is normal flash content
> Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x1a, id2 0x9e, id1
> is normal flash content, id2 is normal flash content
> Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x67, id2 0x21,
> id1 is normal flash content, id2 is normal flash content
> Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x1a, id2 0x9e,
> id1 is normal flash content, id2 is normal flash content
> Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff,
> id1 parity violation, id1 is normal flash content, id2 is normal flash
> content
> Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x67, id2
> 0x21, id1 is normal flash content, id2 is normal flash content
> Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x38, id2
> 0x85, id1 is normal flash content, id2 is normal flash content
> Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x1a, id2
> 0x9e, id1 is normal flash content, id2 is normal flash content
> Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x1a, id2 0x9e,
> id1 is normal flash content, id2 is normal flash content
> Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2
> 0xff, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff,
> id1 parity violation, id1 is normal flash content, id2 is normal flash
> content
> Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than
> supported size 1024 kB of chipset/board/programmer for FWH interface,
> probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x1a, id2 0x9e, id1
> is normal flash content, id2 is normal flash content
> Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x1a, id2 0x9e, id1
> is normal flash content, id2 is normal flash content
> Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x67, id2 0x21, id1 is
> normal flash content, id2 is normal flash content
> Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than
> supported size 1024 kB of chipset/board/programmer for FWH interface,
> probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x1a, id2 0x9e, id1 is
> normal flash content, id2 is normal flash content
> Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
> parity violation, id1 is normal flash content, id2 is normal flash content
> Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x1a, id2
> 0x9e, id1 is normal flash content, id2 is normal flash content
> Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x1a, id2
> 0x9e, id1 is normal flash content, id2 is normal flash content
> Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x1a, id2
> 0x9e, id1 is normal flash content, id2 is normal flash content
> Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x67, id2
> 0x21, id1 is normal flash content, id2 is normal flash content
> Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2
> 0xff, id1 parity violation, id1 is normal flash content, id2 is normal
> flash content
> Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1
> 0x1a, id2 0x9e, id1 is normal flash content, id2 is normal flash content
> Found Programmer flash chip "Opaque flash chip" (1024 kB,
> Programmer-specific).
> Reading flash... Reading 1048576 bytes starting at 0x000000.
> Transaction error between offset 0x00003000 and 0x0000303f (= 0x00003000 +
> 63)!
> HSFS: FDONE=1, FCERR=1, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1
> HSFC: FGO=0, FCYCLE=0, FDBC=63, SME=0
> Read operation failed!
> FAILED.
> Restoring MMIO space at 0x7fb2d7a0e8a0
> Restoring PCI config space for 00:1f:0 reg 0xdc
> [root at localhost ~]#
>
>
> _______________________________________________
> flashrom mailing list
> flashrom at flashrom.org
> http://www.flashrom.org/mailman/listinfo/flashrom
>



-- 
David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
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