[flashrom] [PATCH] Add support for SST25WF080B 1 MB flash.

Ben Gardner gardner.ben at gmail.com
Sun Nov 22 05:46:26 CET 2015


Thanks! I appreciate your attention to details.
I had stopped digging into the code once I got it to do what I needed. =)

On Sat, Nov 21, 2015 at 8:24 PM, Stefan Tauner
<stefan.tauner at alumni.tuwien.ac.at> wrote:
> On Thu, 20 Aug 2015 10:27:15 -0500
> Ben Gardner <bgardner at wabtec.com> wrote:
>
>> Apart from the JEDEC ID (621614) the difference from the SST25WF080 is that
>> it lacks op codes 0xAD (AAI Word program) and 0x52 (32K erase).
>>
>> Tested under Linux with spidev.
>>
>> Signed-off-by: Ben Gardner <bgardner at wabtec.com>
>> ---
>>  flashchips.c | 35 +++++++++++++++++++++++++++++++++++
>>  flashchips.h |  3 ++-
>>  2 files changed, 37 insertions(+), 1 deletion(-)
>>
>> diff --git a/flashchips.c b/flashchips.c
>> index 8b5d1ec..b71bd2c 100644
>> --- a/flashchips.c
>> +++ b/flashchips.c
>> @@ -11803,6 +11803,41 @@ const struct flashchip flashchips[] = {
>>
>>         {
>>                 .vendor         = "SST",
>> +               .name           = "SST25WF080B",
>> +               .bustype        = BUS_SPI,
>> +               .manufacture_id = SST_ID_62,
>> +               .model_id       = SST_SST25WF080B,
>> +               .total_size     = 1024,
>> +               .page_size      = 256,
>> +               .feature_bits   = FEATURE_WRSR_EITHER,
>> +               .tested         = TEST_OK_PREW,
>> +               .probe          = probe_spi_rdid,
>> +               .probe_timing   = TIMING_ZERO,
>> +               .block_erasers  =
>> +               {
>> +                       {
>> +                               .eraseblocks = { {4 * 1024, 256} },
>> +                               .block_erase = spi_block_erase_20,
>> +                       }, {
>> +                               .eraseblocks = { {64 * 1024, 16} },
>> +                               .block_erase = spi_block_erase_d8,
>> +                       }, {
>> +                               .eraseblocks = { {1024 * 1024, 1} },
>> +                               .block_erase = spi_block_erase_60,
>> +                       }, {
>> +                               .eraseblocks = { {1024 * 1024, 1} },
>> +                               .block_erase = spi_block_erase_c7,
>> +                       },
>> +               },
>> +               .printlock      = spi_prettyprint_status_register_sst25, /* *does* have a BP3 but it is useless */
>> +               .unlock         = spi_disable_blockprotect_bp3_srwd,
>> +               .write          = spi_chip_write_256,
>> +               .read           = spi_chip_read, /* Fast read (0x0B) supported */
>> +               .voltage        = {1650, 1950},
>> +       },
>> +
>> +       {
>> +               .vendor         = "SST",
>>                 .name           = "SST28SF040A",
>>                 .bustype        = BUS_PARALLEL,
>>                 .manufacture_id = SST_ID,
>> diff --git a/flashchips.h b/flashchips.h
>> index 07ae49d..d6b2b8d 100644
>> --- a/flashchips.h
>> +++ b/flashchips.h
>> @@ -659,6 +659,7 @@
>>   * byte of device ID is related to log(bitsize) at least for some chips.
>>   */
>>  #define SST_ID                 0xBF    /* SST */
>> +#define SST_ID_62              0x62    /* SST */
>>  #define SST_SST25LF020_REMS    0x43    /* REMS or RES opcode */
>>  #define SST_SST25WF512         0x2501
>>  #define SST_SST25WF010         0x2502
>> @@ -669,7 +670,7 @@
>>   * IDs and were not spotted in the wild yet. Their datasheets show a 4 byte long response w/o a vendor ID. */
>>  #define SST_SST25WF020A                /* 0x62 0x16 0x12 0x00 */
>>  #define SST_SST25WF040B                /* 0x62 0x16 0x13 0x00 */
>> -#define SST_SST25WF080B                /* 0x62 0x16 0x14 0x00 */
>> +#define SST_SST25WF080B                0x1614  /* 0x62 0x16 0x14 0x00 */
>>  #define SST_SST25VF512_REMS    0x48    /* REMS or RES opcode, same as SST25VF512A */
>>  #define SST_SST25VF010_REMS    0x49    /* REMS or RES opcode, same as SST25VF010A */
>>  #define SST_SST25VF020_REMS    0x43    /* REMS or RES opcode, same as SST25LF020A */
>
> Hi Ben,
>
> thanks for your patch. It had a lot of wrong white space (spaces
> instead of tabs) and you missed a few things:
>  - That first ID byte is actually Sanyo's. One can find some news
>    articles on a cooperation between those on flash memory and other
>    stuff in about 2003+. So my guess is that those chips were the
>    outcome of that cooperation.
>  - The comment in flashchip.h stating that these chips were not seen in
>    the wild is no longer valid apparently. :)
>  - The status register does not contain a BP2 bit but a top/bottom bit.
>  - There is no EWSR instruction so it has to use FEATURE_WRSR_WREN.
>
> But the main part seems fine!
>
> I have fixed those errors and added an appropriate status register
> pretty print function. While at it, I have also added the
> SST25WF020A and SST25WF040B as well.
>
> The patch was additionally
> Signed-off-by: Stefan Tauner <stefan.tauner at alumni.tuwien.ac.at>
> and
> Acked-by: Stefan Tauner <stefan.tauner at alumni.tuwien.ac.at>
> and commited in r1901. Thanks!
> --
> Kind regards/Mit freundlichen Grüßen, Stefan Tauner
>
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