[flashrom] [PATCH] Fast flash read speed with FTDI FT2232H programmer
dev at borisbaykov.com
Sun Jan 18 18:01:30 CET 2015
>> The patch increases flash read speed via FTDI FT2232H programmer.
>> New ft2232_spi_read function used instead of spi_read_chunked
>> to read by 64k chunks instead of 256b chunks.
>> According to 3-7 ms FTDI delay for each flash instruction
>> this patch makes read operation faster in about 10 times.
>> To have stable transfers with 64k buffer SPI frequency should
>> be decreased to 5 MHz. I don't know why but higher freqs
>> aren't working correct. DEFAULT_DIVISOR is changed to 12.
> thanks for the patch.
> I see two major problems with it though. First of all the divisor
> to be investigated. I presume you have only tested with a single hardware
> setup, right? I'd like to see results from different dongles/setups...
> conclusive theory why the problems happens at higher frequencies.
This is not exactly right. I've really tested it with a single hardware,
however this hardware is a laptop and I tried to switch it to very
Low-Power mode and run several videos simultaniously with Linux VM that is
used to run flashrom. In the low-power mode with CPU freq 800 instead of
3200 I see no difference with SPI freq. It's still working excellent with
5 MHz on FTDI. So, I suppose that it's not an issue with CPU performance.
I'll move this VM to another PCs soon and will check this patch there. Now
I see the following, Flashrom is working correct all times on 5 MHz but on
6 MHz and higher on EVERY try I see many wrong bytes with FF or 00 in
output file after read. I agree with your thought that this situation
should be further investigated.
> The other thing is the incompatibility of the chunk size... yes, a
> majority of chips support this, but flashrom prioritizes other things:
> stability and compatibility. I don't care for the slowness if that's
> the price for it to work universally with all chips in the wild.
I understand this too. I see and appreciate that you're thinking about
stability and reliability. However it's not difficult to add
max_read_chunk param to flashchips chips definitions. Also this data could
be got by SFDP probably. So, there is no real issue to support 64k read
with enough stability.
In serprog.c we already have 64k supported for all chips. I've added same
support to ft2232_spi.c With this thing I can't see big issues comparing
to unknown SPI freq problems above. 10 times speed gain isn't a bad thing
;-) So, imho, it's a good challenge to solve these small troubles and
apply the patch at the end of investigation and development.
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