[flashrom] Flashing libreboot on x200 using a Shikra

[matcor at riseup.net]

On 2015-04-25 09:00, matcor at riseup.net wrote:
> On 2015-04-25 04:46, Stefan Tauner wrote:
>> On Fri, 24 Apr 2015 21:13:47 -0400
>> matcor at riseup.net wrote:
>> 
>>> Hi,
>>> I'm trying to flash libreboot to my x200 using a Shikra. When it gets 
>>> to
>>> the "Erasing and writing flash chip" part, it seems to hang, but top
>>> shows that flashrom is still using a lot of the CPU. I left it for 
>>> over
>>> 3 hours and it doesn't get any further than my logfile below. Would
>>> anyone be able to shed some light as to what might be going on here?
>>> Thanks.
>>> 
>>> command:
>>> flashrom -p ft2232_spi:type=232H -c "MX25L6405D" -w
>>> x200_8mb_usqwerty_vesafb.rom -V 2>&1 | tee logfile
>>> 
>>> output:
>>> flashrom v0.9.8-r1889 on Linux 3.17.4-301.fc21.x86_64 (x86_64)
>>> flashrom is free software, get the source code at
>>> http://www.flashrom.org
>>> 
>>> flashrom was built with libpci 3.3.0, GCC 4.9.2 20150212 (Red Hat
>>> 4.9.2-6), little endian
>>> Command line (7 args): flashrom -p ft2232_spi:type=232H -c MX25L6405D 
>>> -w
>>> x200_8mb_usqwerty_vesafb.rom -V
>>> Calibrating delay loop... OS timer resolution is 1 usecs, 1491M loops
>>> per second, 10 myus = 10 us, 100 myus = 119 us, 1000 myus = 1019 us,
>>> 10000 myus = 10100 us, 4 myus = 4 us, OK.
>>> Initializing ft2232_spi programmer
>>> Using device type FTDI FT232H channel A.
>>> Disable divide-by-5 front stage
>>> Set clock divisor
>>> MPSSE clock: 60.000000 MHz, divisor: 2, SPI clock: 30.000000 MHz
>>> No loopback of TDI/DO TDO/DI
>>> Set data bits
>>> The following protocols are supported: SPI.
>>> Probing for Macronix MX25L6405D, 8192 kB: probe_spi_rdid_generic: id1
>>> 0xc2, id2 0x2017
>>> Found Macronix flash chip "MX25L6405D" (8192 kB, SPI) on ft2232_spi.
>>> Chip status register is 0xff.
>>> Chip status register: Status Register Write Disable (SRWD, SRP, ...) 
>>> is
>>> set
>>> Chip status register: Bit 6 is set
>>> Chip status register: Block Protect 3 (BP3) is set
>>> Chip status register: Block Protect 2 (BP2) is set
>>> Chip status register: Block Protect 1 (BP1) is set
>>> Chip status register: Block Protect 0 (BP0) is set
>>> Chip status register: Write Enable Latch (WEL) is set
>>> Chip status register: Write In Progress (WIP/BUSY) is set
>>> This chip may contain one-time programmable memory. flashrom cannot 
>>> read
>>> and may never be able to write it, hence it may not be able to
>>> completely
>>> clone the contents of this chip (see man page for details).
>>> Some block protection in effect, disabling...
>>> Need to disable the register lock first... Error: WIP bit after WRSR
>>> never cleared
>>> spi_write_status_register failed.
>>> Reading old flash chip contents... done.
>>> Erasing and writing flash chip... Trying erase function 0...
>>> 0x000000-0x000fff:E
>> 
>> Hi,
>> 
>> it seems that the WIP bit is stuck and we dont handle that gracefully
>> everywhere but just poll it forever. If you retry does it get further?
> 
> No, I've tried again and again but it just stalls at the same place.
> When I use the -VVV switch, it shows an endless loop of "De-assert
> CS#"
> "Assert CS#"
> 
> 
> _______________________________________________
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> flashrom at flashrom.org
> http://www.flashrom.org/mailman/listinfo/flashrom

Hi Stefan,

Based on what you said about the WIP bit being stuck and not handling it 
gracefully, I did a search and found a patch here: 
http://www.flashrom.org/pipermail/flashrom/2014-March/012086.html

...so I patched my sources and recompiled flashrom and gave it another 
shot. Now it handles it more gracefully, but it still fails the erase. 
It goes through four erase functions (0-3) before it quits. Despite the 
errors, I've tried booting it just to see if it works, but it doesn't. 
Here's my new log:

flashrom v0.9.8-r1889 on Linux 3.17.4-301.fc21.x86_64 (x86_64)
flashrom was built with libpci 3.3.0, GCC 4.9.2 20150212 (Red Hat 
4.9.2-6), little endian
Command line (9 args): flashrom -p ft2232_spi:type=232H -c MX25L6405D -w 
x200_8mb_usqwerty_vesafb.rom -V -o logfile
Calibrating delay loop... OS timer resolution is 1 usecs, 1491M loops 
per second, 10 myus = 10 us, 100 myus = 121 us, 1000 myus = 1019 us, 
10000 myus = 10201 us, 4 myus = 4 us, OK.
Initializing ft2232_spi programmer
Using device type FTDI FT232H channel A.
Disable divide-by-5 front stage
Set clock divisor
MPSSE clock: 60.000000 MHz, divisor: 2, SPI clock: 30.000000 MHz
No loopback of TDI/DO TDO/DI
Set data bits
The following protocols are supported: SPI.
Probing for Macronix MX25L6405D, 8192 kB: probe_spi_rdid_generic: id1 
0xc2, id2 0x2017
Found Macronix flash chip "MX25L6405D" (8192 kB, SPI) on ft2232_spi.
Chip status register is 0xff.
Chip status register: Status Register Write Disable (SRWD, SRP, ...) is 
set
Chip status register: Bit 6 is set
Chip status register: Block Protect 3 (BP3) is set
Chip status register: Block Protect 2 (BP2) is set
Chip status register: Block Protect 1 (BP1) is set
Chip status register: Block Protect 0 (BP0) is set
Chip status register: Write Enable Latch (WEL) is set
Chip status register: Write In Progress (WIP/BUSY) is set
This chip may contain one-time programmable memory. flashrom cannot read
and may never be able to write it, hence it may not be able to 
completely
clone the contents of this chip (see man page for details).
Some block protection in effect, disabling...
	Need to disable the register lock first... WIP bit after command 01 
slow (still set after 2450000 us), status=0xff.
Error: WIP bit after command 01 still set after 4900000 us, status=0xff.
spi_write_status_register failed.
Reading old flash chip contents... done.
Erasing and writing flash chip... Trying erase function 0... 
0x000000-0x000fff:EWIP bit after command 20 slow (still set after 
5000000 us), status=0xff.
Error: WIP bit after command 20 still set after 10000000 us, 
status=0xff.
Reading current flash chip contents... done. Looking for another erase 
function.
Trying erase function 1... 0x000000-0x00ffff:EWIP bit after command d8 
slow (still set after 5000000 us), status=0xff.
Error: WIP bit after command d8 still set after 10000000 us, 
status=0xff.
Reading current flash chip contents... done. Looking for another erase 
function.
Trying erase function 2... 0x000000-0x7fffff:EWIP bit after command 60 
slow (still set after 60000000 us), status=0xff.
Error: WIP bit after command 60 still set after 120000000 us, 
status=0xff.
Reading current flash chip contents... done. Looking for another erase 
function.
Trying erase function 3... 0x000000-0x7fffff:EWIP bit after command c7 
slow (still set after 60000000 us), status=0xff.
Error: WIP bit after command c7 still set after 120000000 us, 
status=0xff.
Looking for another erase function.
No usable erase functions left.
FAILED!
Uh oh. Erase/write failed. Checking if anything has changed.
Reading current flash chip contents... done.
Apparently at least some data has changed.
Your flash chip is in an unknown state.
Please report this on IRC at chat.freenode.net (channel #flashrom) or
mail flashrom at flashrom.org, thanks!