[flashrom] Flashing libreboot on x200 using a Shikra

Stefan Tauner stefan.tauner at alumni.tuwien.ac.at
Sat Apr 25 10:46:42 CEST 2015


On Fri, 24 Apr 2015 21:13:47 -0400
matcor at riseup.net wrote:

> Hi,
> I'm trying to flash libreboot to my x200 using a Shikra. When it gets to 
> the "Erasing and writing flash chip" part, it seems to hang, but top 
> shows that flashrom is still using a lot of the CPU. I left it for over 
> 3 hours and it doesn't get any further than my logfile below. Would 
> anyone be able to shed some light as to what might be going on here? 
> Thanks.
> 
> command:
> flashrom -p ft2232_spi:type=232H -c "MX25L6405D" -w 
> x200_8mb_usqwerty_vesafb.rom -V 2>&1 | tee logfile
> 
> output:
> flashrom v0.9.8-r1889 on Linux 3.17.4-301.fc21.x86_64 (x86_64)
> flashrom is free software, get the source code at 
> http://www.flashrom.org
> 
> flashrom was built with libpci 3.3.0, GCC 4.9.2 20150212 (Red Hat 
> 4.9.2-6), little endian
> Command line (7 args): flashrom -p ft2232_spi:type=232H -c MX25L6405D -w 
> x200_8mb_usqwerty_vesafb.rom -V
> Calibrating delay loop... OS timer resolution is 1 usecs, 1491M loops 
> per second, 10 myus = 10 us, 100 myus = 119 us, 1000 myus = 1019 us, 
> 10000 myus = 10100 us, 4 myus = 4 us, OK.
> Initializing ft2232_spi programmer
> Using device type FTDI FT232H channel A.
> Disable divide-by-5 front stage
> Set clock divisor
> MPSSE clock: 60.000000 MHz, divisor: 2, SPI clock: 30.000000 MHz
> No loopback of TDI/DO TDO/DI
> Set data bits
> The following protocols are supported: SPI.
> Probing for Macronix MX25L6405D, 8192 kB: probe_spi_rdid_generic: id1 
> 0xc2, id2 0x2017
> Found Macronix flash chip "MX25L6405D" (8192 kB, SPI) on ft2232_spi.
> Chip status register is 0xff.
> Chip status register: Status Register Write Disable (SRWD, SRP, ...) is 
> set
> Chip status register: Bit 6 is set
> Chip status register: Block Protect 3 (BP3) is set
> Chip status register: Block Protect 2 (BP2) is set
> Chip status register: Block Protect 1 (BP1) is set
> Chip status register: Block Protect 0 (BP0) is set
> Chip status register: Write Enable Latch (WEL) is set
> Chip status register: Write In Progress (WIP/BUSY) is set
> This chip may contain one-time programmable memory. flashrom cannot read
> and may never be able to write it, hence it may not be able to 
> completely
> clone the contents of this chip (see man page for details).
> Some block protection in effect, disabling...
> Need to disable the register lock first... Error: WIP bit after WRSR 
> never cleared
> spi_write_status_register failed.
> Reading old flash chip contents... done.
> Erasing and writing flash chip... Trying erase function 0... 
> 0x000000-0x000fff:E

Hi,

it seems that the WIP bit is stuck and we dont handle that gracefully
everywhere but just poll it forever. If you retry does it get further?
-- 
Kind regards/Mit freundlichen Grüßen, Stefan Tauner




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