[flashrom] Pegatron/Asus M2N68-LA: flashrom -V

Stefan Tauner stefan.tauner at alumni.tuwien.ac.at
Wed May 7 17:49:36 CEST 2014


On Wed, 07 May 2014 17:34:32 +0200
Kristian Rasmussen <kristian_rasmussen at fastmail.co.uk> wrote:

> Found Macronix flash chip "MX25L8005/MX25V8005" (1024 kB, SPI).
> Some block protection in effect, disabling... Block protection could not
> be disabled!
> Chip status register is 0x9e.
> Chip status register: Status Register Write Disable (SRWD, SRP, ...) is set
> Chip status register: Bit 6 is not set
> Chip status register: Bit 5 is not set
> Chip status register: Block Protect 2 (BP2) is set
> Chip status register: Block Protect 1 (BP1) is set
> Chip status register: Block Protect 0 (BP0) is set
> Chip status register: Write Enable Latch (WEL) is set
> Chip status register: Write In Progress (WIP/BUSY) is not set

Ah I have missed that the first time... we would need to add a small
piece of code to toggle a pin to lift that write protection. This is a
board-specific routine. Please send us the output of 'lspci -nnvvvxxx'.

If there is anyone out there who wants to try to RE the correct board
enable, here is the binary:
http://ftp.hp.com/pub/softlib/software9/COL21072/pv-55440-1/sp37190.exe
-- 
Kind regards/Mit freundlichen Grüßen, Stefan Tauner




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