[flashrom] [PATCH] Return error if malloc fail for undo_pci_write
Niklas Söderlund
niso at kth.se
Mon Sep 23 20:23:42 CEST 2013
All callers modified to handle and propagate return codes instead of
relaying on the exit call.
Signed-off-by: Niklas Söderlund <niso at kth.se>
---
atahpt.c | 3 +-
chipset_enable.c | 103 +++++++++++++++++++++++++++++++++++++------------------
drkaiser.c | 3 +-
gfxnvidia.c | 3 +-
pcidev.c | 21 +++++++++---
5 files changed, 93 insertions(+), 40 deletions(-)
diff --git a/atahpt.c b/atahpt.c
index 242e14a..8ba9c9b 100644
--- a/atahpt.c
+++ b/atahpt.c
@@ -75,7 +75,8 @@ int atahpt_init(void)
/* Enable flash access. */
reg32 = pci_read_long(dev, REG_FLASH_ACCESS);
reg32 |= (1 << 24);
- rpci_write_long(dev, REG_FLASH_ACCESS, reg32);
+ if (rpci_write_long(dev, REG_FLASH_ACCESS, reg32))
+ return 1;
register_par_programmer(&par_programmer_atahpt, BUS_PARALLEL);
diff --git a/chipset_enable.c b/chipset_enable.c
index c85db73..2a93c7c 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -51,7 +51,8 @@ static int enable_flash_ali_m1533(struct pci_dev *dev, const char *name)
*/
tmp = pci_read_byte(dev, 0x47);
tmp |= 0x46;
- rpci_write_byte(dev, 0x47, tmp);
+ if (rpci_write_byte(dev, 0x47, tmp))
+ return ERROR_FATAL;
return 0;
}
@@ -88,7 +89,8 @@ static int enable_flash_sis85c496(struct pci_dev *dev, const char *name)
tmp = pci_read_byte(dev, 0xd0);
tmp |= 0xf8;
- rpci_write_byte(dev, 0xd0, tmp);
+ if (rpci_write_byte(dev, 0xd0, tmp))
+ return ERROR_FATAL;
return 0;
}
@@ -103,7 +105,9 @@ static int enable_flash_sis_mapping(struct pci_dev *dev, const char *name)
new = pci_read_byte(dev, SIS_MAPREG);
new &= (~0x04); /* No idea why we clear bit 2. */
new |= 0xb; /* 0x3 for some chipsets, bit 7 seems to be don't care. */
- rpci_write_byte(dev, SIS_MAPREG, new);
+ if (rpci_write_byte(dev, SIS_MAPREG, new))
+ return ERROR_FATAL;
+
newer = pci_read_byte(dev, SIS_MAPREG);
if (newer != new) { /* FIXME: share this with other code? */
msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n",
@@ -193,7 +197,9 @@ static int enable_flash_sis5x0(struct pci_dev *dev, const char *name, uint8_t di
new = pci_read_byte(sbdev, SIS_REG);
new &= (~dis_mask);
new |= en_mask;
- rpci_write_byte(sbdev, SIS_REG, new);
+ if (rpci_write_byte(sbdev, SIS_REG, new))
+ return ERROR_FATAL;
+
newer = pci_read_byte(sbdev, SIS_REG);
if (newer != new) { /* FIXME: share this with other code? */
msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", SIS_REG, new, name);
@@ -250,7 +256,8 @@ static int enable_flash_piix4(struct pci_dev *dev, const char *name)
if (new == old)
return 0;
- rpci_write_word(dev, xbcs, new);
+ if (rpci_write_word(dev, xbcs, new))
+ return ERROR_FATAL;
if (pci_read_word(dev, xbcs) != new) { /* FIXME: share this with other code? */
msg_pinfo("Setting register 0x%04x to 0x%04x on %s failed (WARNING ONLY).\n", xbcs, new, name);
@@ -291,7 +298,8 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_
/* Only write the register if it's necessary */
if (wanted != old) {
- rpci_write_byte(dev, bios_cntl, wanted);
+ if (rpci_write_byte(dev, bios_cntl, wanted))
+ return ERROR_FATAL;
new = pci_read_byte(dev, bios_cntl);
} else
new = old;
@@ -369,8 +377,10 @@ static int enable_flash_ich_fwh_decode(struct pci_dev *dev, const char *name, en
msg_pdbg("\nSetting IDSEL from 0x%012" PRIx64 " to "
"0x%012" PRIx64 " for top 16 MB.", fwh_idsel_old,
fwh_idsel);
- rpci_write_long(dev, fwh_sel1, (fwh_idsel >> 16) & 0xffffffff);
- rpci_write_word(dev, fwh_sel2, fwh_idsel & 0xffff);
+ if (rpci_write_long(dev, fwh_sel1, (fwh_idsel >> 16) & 0xffffffff))
+ return ERROR_FATAL;
+ if (rpci_write_word(dev, fwh_sel2, fwh_idsel & 0xffff))
+ return ERROR_FATAL;
/* FIXME: Decode settings are not changed. */
} else if (idsel) {
msg_perr("Error: fwh_idsel= specified, but no value given.\n");
@@ -514,7 +524,8 @@ static int enable_flash_poulsbo(struct pci_dev *dev, const char *name)
new = old & ~1;
if (new != old)
- rpci_write_byte(dev, 0xd9, new);
+ if (rpci_write_byte(dev, 0xd9, new))
+ return ERROR_FATAL;
internal_buses_supported = BUS_FWH;
return 0;
@@ -537,7 +548,8 @@ static int enable_flash_tunnelcreek(struct pci_dev *dev, const char *name)
msg_pdbg("BIOS Prefetch Enable: %sabled, ", (old & 1) ? "en" : "dis");
new = old & ~1;
if (new != old)
- rpci_write_byte(dev, 0xd9, new);
+ if (rpci_write_byte(dev, 0xd9, new))
+ return ERROR_FATAL;
/* Get physical address of Root Complex Register Block */
tmp = pci_read_long(dev, 0xf0) & 0xffffc000;
@@ -745,7 +757,8 @@ static int via_no_byte_merge(struct pci_dev *dev, const char *name)
if (val & 0x40) {
msg_pdbg("Disabling byte merging\n");
val &= ~0x40;
- rpci_write_byte(dev, 0x71, val);
+ if (rpci_write_byte(dev, 0x71, val))
+ return ERROR_FATAL;
}
return NOT_DONE_YET; /* need to find south bridge, too */
}
@@ -755,12 +768,14 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name)
uint8_t val;
/* Enable ROM decode range (1MB) FFC00000 - FFFFFFFF. */
- rpci_write_byte(dev, 0x41, 0x7f);
+ if (rpci_write_byte(dev, 0x41, 0x7f))
+ return ERROR_FATAL;
/* ROM write enable */
val = pci_read_byte(dev, 0x40);
val |= 0x10;
- rpci_write_byte(dev, 0x40, val);
+ if (rpci_write_byte(dev, 0x40, val))
+ return ERROR_FATAL;
if (pci_read_byte(dev, 0x40) != val) {
msg_pwarn("\nWarning: Failed to enable flash write on \"%s\"\n", name);
@@ -771,7 +786,8 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name)
/* All memory cycles, not just ROM ones, go to LPC. */
val = pci_read_byte(dev, 0x59);
val &= ~0x80;
- rpci_write_byte(dev, 0x59, val);
+ if (rpci_write_byte(dev, 0x59, val))
+ return ERROR_FATAL;
}
return 0;
@@ -866,12 +882,14 @@ static int enable_flash_cs5530(struct pci_dev *dev, const char *name)
reg8 |= LOWER_ROM_ADDRESS_RANGE;
reg8 |= UPPER_ROM_ADDRESS_RANGE;
reg8 |= ROM_WRITE_ENABLE;
- rpci_write_byte(dev, ROM_AT_LOGIC_CONTROL_REG, reg8);
+ if (rpci_write_byte(dev, ROM_AT_LOGIC_CONTROL_REG, reg8))
+ return ERROR_FATAL;
/* Set positive decode on ROM. */
reg8 = pci_read_byte(dev, DECODE_CONTROL_REG2);
reg8 |= BIOS_ROM_POSITIVE_DECODE;
- rpci_write_byte(dev, DECODE_CONTROL_REG2, reg8);
+ if (rpci_write_byte(dev, DECODE_CONTROL_REG2, reg8))
+ return ERROR_FATAL;
reg8 = pci_read_byte(dev, CS5530_RESET_CONTROL_REG);
if (reg8 & CS5530_ISA_MASTER) {
@@ -936,7 +954,8 @@ static int enable_flash_sc1100(struct pci_dev *dev, const char *name)
#define SC_REG 0x52
uint8_t new;
- rpci_write_byte(dev, SC_REG, 0xee);
+ if (rpci_write_byte(dev, SC_REG, 0xee))
+ return ERROR_FATAL;
new = pci_read_byte(dev, SC_REG);
@@ -965,7 +984,8 @@ static int enable_flash_amd_via(struct pci_dev *dev, const char *name, uint8_t d
old = pci_read_byte(dev, AMD_MAPREG);
new = old | decode_val;
if (new != old) {
- rpci_write_byte(dev, AMD_MAPREG, new);
+ if (rpci_write_byte(dev, AMD_MAPREG, new))
+ return ERROR_FATAL;
if (pci_read_byte(dev, AMD_MAPREG) != new) {
msg_pwarn("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n",
AMD_MAPREG, new, name);
@@ -978,7 +998,8 @@ static int enable_flash_amd_via(struct pci_dev *dev, const char *name, uint8_t d
new = old | 0x01;
if (new == old)
return 0;
- rpci_write_byte(dev, AMD_ENREG, new);
+ if (rpci_write_byte(dev, AMD_ENREG, new))
+ return ERROR_FATAL;
if (pci_read_byte(dev, AMD_ENREG) != new) {
msg_pwarn("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n",
@@ -1030,7 +1051,8 @@ static int enable_flash_sb600(struct pci_dev *dev, const char *name)
(prot & 0xfffff800),
(prot & 0xfffff800) + (((prot & 0x7fc) << 8) | 0x3ff));
prot &= 0xfffffffc;
- rpci_write_byte(dev, reg, prot);
+ if (rpci_write_byte(dev, reg, prot))
+ return ERROR_FATAL;
prot = pci_read_long(dev, reg);
if (prot & 0x3)
msg_perr("SB600 %s%sunprotect failed from 0x%08x to 0x%08x\n",
@@ -1092,7 +1114,9 @@ static int enable_flash_nvidia_common(struct pci_dev *dev, const char *name)
if (new == old)
return 0;
- rpci_write_byte(dev, 0x6d, new);
+ if (rpci_write_byte(dev, 0x6d, new))
+ return ERROR_FATAL;
+
if (pci_read_byte(dev, 0x6d) != new) {
msg_pinfo("Setting register 0x6d to 0x%02x on %s failed.\n", new, name);
return 1;
@@ -1102,7 +1126,9 @@ static int enable_flash_nvidia_common(struct pci_dev *dev, const char *name)
static int enable_flash_nvidia_nforce2(struct pci_dev *dev, const char *name)
{
- rpci_write_byte(dev, 0x92, 0);
+ if (rpci_write_byte(dev, 0x92, 0))
+ return ERROR_FATAL;
+
if (enable_flash_nvidia_common(dev, name))
return ERROR_NONFATAL;
else
@@ -1124,7 +1150,8 @@ static int enable_flash_ck804(struct pci_dev *dev, const char *name)
err++;
} else {
msg_pdbg("Unlocking protection in register 0x%02x... ", reg);
- rpci_write_byte(dev, reg, segctrl & 0xF0);
+ if (rpci_write_byte(dev, reg, segctrl & 0xF0))
+ return ERROR_FATAL;
segctrl = pci_read_byte(dev, reg);
if ((segctrl & 0x3) != 0x0) {
@@ -1148,7 +1175,8 @@ static int enable_flash_ck804(struct pci_dev *dev, const char *name)
continue;
}
msg_pdbg("Unlocking protection in register 0x%02x... ", reg);
- rpci_write_long(dev, reg, 0x00000000);
+ if (rpci_write_long(dev, reg, 0x00000000))
+ return ERROR_FATAL;
segctrl = pci_read_long(dev, reg);
if ((segctrl & 0x33333333) != 0x00000000) {
@@ -1168,7 +1196,8 @@ static int enable_flash_ck804(struct pci_dev *dev, const char *name)
old = pci_read_byte(dev, reg);
new = old | 0xC0;
if (new != old) {
- rpci_write_byte(dev, reg, new);
+ if (rpci_write_byte(dev, reg, new))
+ return ERROR_FATAL;
if (pci_read_byte(dev, reg) != new) { /* FIXME: share this with other code? */
msg_pinfo("Setting register 0x%02x to 0x%02x on %s failed.\n", reg, new, name);
err++;
@@ -1218,12 +1247,14 @@ static int enable_flash_sb400(struct pci_dev *dev, const char *name)
/* Enable some SMBus stuff. */
tmp = pci_read_byte(smbusdev, 0x79);
tmp |= 0x01;
- rpci_write_byte(smbusdev, 0x79, tmp);
+ if (rpci_write_byte(smbusdev, 0x79, tmp))
+ return ERROR_FATAL;
/* Change southbridge. */
tmp = pci_read_byte(dev, 0x48);
tmp |= 0x21;
- rpci_write_byte(dev, 0x48, tmp);
+ if (rpci_write_byte(dev, 0x48, tmp))
+ return ERROR_FATAL;
/* Now become a bit silly. */
tmp = INB(0xc6f);
@@ -1245,13 +1276,16 @@ static int enable_flash_mcp55(struct pci_dev *dev, const char *name)
/* Set the 0-16 MB enable bits. */
val = pci_read_byte(dev, 0x88);
val |= 0xff; /* 256K */
- rpci_write_byte(dev, 0x88, val);
+ if (rpci_write_byte(dev, 0x88, val))
+ return ERROR_FATAL;
val = pci_read_byte(dev, 0x8c);
val |= 0xff; /* 1M */
- rpci_write_byte(dev, 0x8c, val);
+ if (rpci_write_byte(dev, 0x8c, val))
+ return ERROR_FATAL;
wordval = pci_read_word(dev, 0x90);
wordval |= 0x7fff; /* 16M */
- rpci_write_word(dev, 0x90, wordval);
+ if (rpci_write_word(dev, 0x90, wordval))
+ return ERROR_FATAL;
if (enable_flash_nvidia_common(dev, name))
return ERROR_NONFATAL;
@@ -1306,7 +1340,8 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name)
#if 0
val |= (1 << 6);
val &= ~(1 << 5);
- rpci_write_byte(dev, 0x8a, val);
+ if (rpci_write_byte(dev, 0x8a, val))
+ return ERROR_FATAL;
#endif
if (mcp6x_spi_init(want_spi))
@@ -1329,11 +1364,13 @@ static int enable_flash_ht1000(struct pci_dev *dev, const char *name)
/* Set the 4MB enable bit. */
val = pci_read_byte(dev, 0x41);
val |= 0x0e;
- rpci_write_byte(dev, 0x41, val);
+ if (rpci_write_byte(dev, 0x41, val))
+ return ERROR_FATAL;
val = pci_read_byte(dev, 0x43);
val |= (1 << 4);
- rpci_write_byte(dev, 0x43, val);
+ if (rpci_write_byte(dev, 0x43, val))
+ return ERROR_FATAL;
return 0;
}
diff --git a/drkaiser.c b/drkaiser.c
index 0cf1fdb..407bf1a 100644
--- a/drkaiser.c
+++ b/drkaiser.c
@@ -73,7 +73,8 @@ int drkaiser_init(void)
return 1;
/* Write magic register to enable flash write. */
- rpci_write_word(dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE);
+ if (rpci_write_word(dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE))
+ return 1;
/* Map 128kB flash memory window. */
drkaiser_bar = rphysmap("Dr. Kaiser PC-Waechter flash memory", addr, DRKAISER_MEMMAP_SIZE);
diff --git a/gfxnvidia.c b/gfxnvidia.c
index d3ee14e..582298d 100644
--- a/gfxnvidia.c
+++ b/gfxnvidia.c
@@ -103,7 +103,8 @@ int gfxnvidia_init(void)
/* Allow access to flash interface (will disable screen). */
reg32 = pci_read_long(dev, 0x50);
reg32 &= ~(1 << 0);
- rpci_write_long(dev, 0x50, reg32);
+ if (rpci_write_long(dev, 0x50, reg32))
+ return 1;
/* Write/erase doesn't work. */
programmer_may_write = 0;
diff --git a/pcidev.c b/pcidev.c
index 3a3f77c..b3fdead 100644
--- a/pcidev.c
+++ b/pcidev.c
@@ -21,6 +21,7 @@
#include <stdlib.h>
#include <string.h>
+#include <errno.h>
#include "flash.h"
#include "programmer.h"
#include "hwaccess.h"
@@ -302,7 +303,7 @@ int undo_pci_write(void *p)
undo_pci_write_data = malloc(sizeof(struct undo_pci_write_data)); \
if (!undo_pci_write_data) { \
msg_gerr("Out of memory!\n"); \
- exit(1); \
+ return ENOMEM; \
} \
undo_pci_write_data->dev = *a; \
undo_pci_write_data->reg = b; \
@@ -318,17 +319,29 @@ int undo_pci_write(void *p)
int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data)
{
register_undo_pci_write_byte(dev, reg);
- return pci_write_byte(dev, reg, data);
+ if (pci_write_byte(dev, reg, data) != 1) {
+ msg_gerr("pci write byte failed\n");
+ return 1;
+ }
+ return 0;
}
int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data)
{
register_undo_pci_write_word(dev, reg);
- return pci_write_word(dev, reg, data);
+ if (pci_write_word(dev, reg, data) != 1) {
+ msg_gerr("pci write word failed\n");
+ return 1;
+ }
+ return 0;
}
int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data)
{
register_undo_pci_write_long(dev, reg);
- return pci_write_long(dev, reg, data);
+ if (pci_write_long(dev, reg, data) != 1) {
+ msg_gerr("pci write long failed\n");
+ return 1;
+ }
+ return 0;
}
--
1.8.3.4
More information about the flashrom
mailing list